Presentation | 2007-04-27 Linear Time-invariant Analysis of CMOS output Buffer with LECCS Model Using Time-variant Resistors Atsushi KOYAMA, Takashi HISAKADO, Osami WADA, |
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Abstract(in Japanese) | (See Japanese page) |
Abstract(in English) | A new modeling method for fast time-domain simulation of power-supply noise fo a CMOS output buffer is proposed. Transistor switches are modeled as linear time-variant resistors, and a linear time-variant model is obtained. Under the condition that the transient duration of the transistors is short enough compared to the time-constants of power and ground bounces, the model can be analyzed only by linear time-invariant simulations, so that fast simulation becomes possible. |
Keyword(in Japanese) | (See Japanese page) |
Keyword(in English) | EMC / CMOS / time-variant circuit / transition matrix / linear simulation |
Paper # | EMCJ2007-8 |
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Committee | EMCJ |
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Conference Date | 2007/4/20(1days) |
Place (in Japanese) | (See Japanese page) |
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Topics (in Japanese) | (See Japanese page) |
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Registration To | Electromagnetic Compatibility (EMCJ) |
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Language | JPN |
Title (in Japanese) | (See Japanese page) |
Sub Title (in Japanese) | (See Japanese page) |
Title (in English) | Linear Time-invariant Analysis of CMOS output Buffer with LECCS Model Using Time-variant Resistors |
Sub Title (in English) | |
Keyword(1) | EMC |
Keyword(2) | CMOS |
Keyword(3) | time-variant circuit |
Keyword(4) | transition matrix |
Keyword(5) | linear simulation |
1st Author's Name | Atsushi KOYAMA |
1st Author's Affiliation | Department of Electrical Engineering Kyoto University() |
2nd Author's Name | Takashi HISAKADO |
2nd Author's Affiliation | Department of Electrical Engineering Kyoto University |
3rd Author's Name | Osami WADA |
3rd Author's Affiliation | Department of Electrical Engineering Kyoto University |
Date | 2007-04-27 |
Paper # | EMCJ2007-8 |
Volume (vol) | vol.107 |
Number (no) | 25 |
Page | pp.pp.- |
#Pages | 6 |
Date of Issue |