| Presentation | 2007-03-09 Effecto of the Number of Wiring Layers on the Chip Area of Multiplies Hirotaka KAWASHIMA, Naofumi TAKAGI, Kazuyoshi TAKAGI, |
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| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | The number of metal layers usable for wiring is increasing because of the progress of manufacturing technologies of VLSI. The amount of interconnections which are wired above cells increases according to the increasesof wiring layers. Since the area for interconnections is reduced, circuits can be designed with smaller area. Multiplication is one of the basic arithmetic operations and many ASICs have multipliers. Multipliers occupy large area in ASICs and the size and the manufacturing cost of ASICs is effected by the area of multipliers. We have designed multipliers using various implementation, and have investigated the effect ofthe number of wiring layers on the chip area of multipliers. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | multiplier / multilayer interconnection / wiring layer / circuit area |
| Paper # | VLD2006-141,ICD2006-232 |
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| Conference Information | |
| Committee | ICD |
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| Conference Date | 2007/3/2(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Chair | |
| Vice Chair | |
| Secretary | |
| Assistant | |
| Paper Information | |
| Registration To | Integrated Circuits and Devices (ICD) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Effecto of the Number of Wiring Layers on the Chip Area of Multiplies |
| Sub Title (in English) | |
| Keyword(1) | multiplier |
| Keyword(2) | multilayer interconnection |
| Keyword(3) | wiring layer |
| Keyword(4) | circuit area |
| 1st Author's Name | Hirotaka KAWASHIMA |
| 1st Author's Affiliation | Department of Infromation Engineering, Graduate School of Information Science, Nagoya University() |
| 2nd Author's Name | Naofumi TAKAGI |
| 2nd Author's Affiliation | Department of Infromation Engineering, Graduate School of Information Science, Nagoya University |
| 3rd Author's Name | Kazuyoshi TAKAGI |
| 3rd Author's Affiliation | Department of Infromation Engineering, Graduate School of Information Science, Nagoya University |
| Date | 2007-03-09 |
| Paper # | VLD2006-141,ICD2006-232 |
| Volume (vol) | vol.106 |
| Number (no) | 552 |
| Page | pp.pp.- |
| #Pages | 5 |
| Date of Issue | |