Presentation 2007-03-08
Design of RSA Encryption circuit with embedded Fixed Private Key using Via Programmable Logic VPEX
Hiroshi Shimomura, Kazuki Okuyama, Akihiro Nakamura, Takeshi Fujino,
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Abstract(in English) We have been studied the Via Programmable Logic Architecture VPEX (Via Programmable Logic using EXOR array). As similar to FPGA, variable logic circuit can be programmed in VPEX by changing mask layout of VIA1 and VIA3. The "Unique LSI", whose logic circuit is different each other, can be manufactured by using VPEX architecture and EB direct writing technique. In this paper, the LSI architecture for parsonal identification is examined as the sample application of the "Unique LSI". The detail of VPEX architecture is explained in the first half, and the circuit design of RSA Encryption circuit with embedded private key is studied in the second half.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) Programmable Logic / EB direct writing / Public Key Infrastructure / RSA Cryptography
Paper # VLD2006-136,ICD2006-227
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Conference Date 2007/3/1(1days)
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Registration To Integrated Circuits and Devices (ICD)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Design of RSA Encryption circuit with embedded Fixed Private Key using Via Programmable Logic VPEX
Sub Title (in English)
Keyword(1) Programmable Logic
Keyword(2) EB direct writing
Keyword(3) Public Key Infrastructure
Keyword(4) RSA Cryptography
1st Author's Name Hiroshi Shimomura
1st Author's Affiliation Graduate school of Science and Engineering, Ritsumeikan University()
2nd Author's Name Kazuki Okuyama
2nd Author's Affiliation Faculty of Science and Engineering, Ritsumeikan University
3rd Author's Name Akihiro Nakamura
3rd Author's Affiliation Graduate school of Science and Engineering, Ritsumeikan University
4th Author's Name Takeshi Fujino
4th Author's Affiliation Graduate school of Science and Engineering, Ritsumeikan University ; Faculty of Science and Engineering, Ritsumeikan University
Date 2007-03-08
Paper # VLD2006-136,ICD2006-227
Volume (vol) vol.106
Number (no) 551
Page pp.pp.-
#Pages 6
Date of Issue