Presentation 2007-03-08
Relocation Method for Circuit Modification
Kunihiko YANAGIBASHI, Yasuhiro TAKASHIMA, Yuichi NAKAMURA,
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Abstract(in English) In this paper, we propose a novel migration method when the circuit with its placement is modified. In the method, its output placement keeps the structure of the original placement, called model placement, as possible. For the purpose, We minimize the total amount of displacement between the model placement and the relocated placement. Moreover, to archive a short run-time and efficiency, we employ the limitation of solution space and the change of packing origin in the optimization process. We construct the system on Sequence-Pair. Experimental results show that our approach preserves the chip area and the overall circuit structure with 98% less run-time than that by an ordinary Simulated Annealing.
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Keyword(in English) Non full-reverse-order constraint / Circuit Modification / Relocation / Sequence-Pair / Simulated Annealing
Paper # VLD2006-133,ICD2006-224
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Conference Date 2007/3/1(1days)
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Registration To Integrated Circuits and Devices (ICD)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Relocation Method for Circuit Modification
Sub Title (in English)
Keyword(1) Non full-reverse-order constraint
Keyword(2) Circuit Modification
Keyword(3) Relocation
Keyword(4) Sequence-Pair
Keyword(5) Simulated Annealing
1st Author's Name Kunihiko YANAGIBASHI
1st Author's Affiliation Department of Information and Media Sciences Faculty of Environmental Engineering, The University of Kitakyushu()
2nd Author's Name Yasuhiro TAKASHIMA
2nd Author's Affiliation Department of Information and Media Sciences Faculty of Environmental Engineering, The University of Kitakyushu
3rd Author's Name Yuichi NAKAMURA
3rd Author's Affiliation Department of Information and Media Sciences Faculty of Environmental Engineering, The University of Kitakyushu
Date 2007-03-08
Paper # VLD2006-133,ICD2006-224
Volume (vol) vol.106
Number (no) 551
Page pp.pp.-
#Pages 6
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