| Presentation | 2007/3/1 Automatic routing methods to make it easy to modify after routing Toshihiko YOKOMARU, Takahide YOSHIKAWA, Yuzi KANAZAWA, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | In LSI designing with automatic routing tools, correcting logics or routing results after automatic routing is necessary to satisfy design rules and timing limitations. The logics or routing results are corrected by CAD tools or manually. In order to make TAT short, these corrections might not to affect other routing results. In this paper, we propose two new routing methods; (1)bundle-routing: tying logic clusters and routing in a bundle for the first, and (2) local correction: auto correcting wires in a small restricted area; to keep the modification area smaller. We apply these methods to the commercial large-scale CPU processor, and the results show that our methods make it easy to modify wires and then shorten the correction time. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | automatic routing / bundle-routing / correction of routing |
| Paper # | VLD-2006-132,ICD2006-223 |
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| Conference Information | |
| Committee | ICD |
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| Conference Date | 2007/3/1(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
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| Paper Information | |
| Registration To | Integrated Circuits and Devices (ICD) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Automatic routing methods to make it easy to modify after routing |
| Sub Title (in English) | |
| Keyword(1) | automatic routing |
| Keyword(2) | bundle-routing |
| Keyword(3) | correction of routing |
| 1st Author's Name | Toshihiko YOKOMARU |
| 1st Author's Affiliation | CAD Laboratory, Information Technology Core Laboratories, Fujitsu Laboratories Ltd.() |
| 2nd Author's Name | Takahide YOSHIKAWA |
| 2nd Author's Affiliation | CAD Laboratory, Information Technology Core Laboratories, Fujitsu Laboratories Ltd. |
| 3rd Author's Name | Yuzi KANAZAWA |
| 3rd Author's Affiliation | CAD Laboratory, Information Technology Core Laboratories, Fujitsu Laboratories Ltd. |
| Date | 2007/3/1 |
| Paper # | VLD-2006-132,ICD2006-223 |
| Volume (vol) | vol.106 |
| Number (no) | 551 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |