| Presentation | 2007-03-08 Escape Fitting between a Pair of Pin-sets Masato INAGI, Yasuhiro TAKASHIMA, Yoji KAJITANI, |
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| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | Because of the increasing number of I/O-pins on a VLSI, the chance to adopt Ball Grid Array packages, which accommodate a large number of I/O-pins by using the whole area of its bottom surface, is increasing. Due to the dense pin layout of BGA packages, secape routing design on a printed circuit board is becoming more difficult. In this paper, we deal with a single layer routing problem to connect pins between two BGA packages. When corresponding pin pairs of two BGA packages are given, the orders of escape routings on the boundary of packages must be matched. For routing representation, we employ Potential Router method, which represents wiring routes by giving potential values to pins. To connect corresponding pin pairs, we utilize a characteristic of Potential Router, which guarantees a one-on-one correspondence between potential values and the orders of escape routes on the boundary of a pin-set. We aim to decrease the maximum routing congestion by changing routes exchanging the potential values of pins by simulated annealing method. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | BGA package / Escape routing / PCB / Potential router |
| Paper # | VLD2006-130,ICD2006-221 |
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| Conference Information | |
| Committee | ICD |
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| Conference Date | 2007/3/1(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
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| Vice Chair | |
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| Paper Information | |
| Registration To | Integrated Circuits and Devices (ICD) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Escape Fitting between a Pair of Pin-sets |
| Sub Title (in English) | |
| Keyword(1) | BGA package |
| Keyword(2) | Escape routing |
| Keyword(3) | PCB |
| Keyword(4) | Potential router |
| 1st Author's Name | Masato INAGI |
| 1st Author's Affiliation | Faculty of Environmental Engineering, The University of Kitakyushu() |
| 2nd Author's Name | Yasuhiro TAKASHIMA |
| 2nd Author's Affiliation | Faculty of Environmental Engineering, The University of Kitakyushu |
| 3rd Author's Name | Yoji KAJITANI |
| 3rd Author's Affiliation | Faculty of Environmental Engineering, The University of Kitakyushu |
| Date | 2007-03-08 |
| Paper # | VLD2006-130,ICD2006-221 |
| Volume (vol) | vol.106 |
| Number (no) | 551 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |