| Presentation | 2007-03-07 An On-Chip Multi-Channel Rail-to-Rail Signal Monitoring Technique for Sub-100-nm Digital Signal Integrity Yoji BANDO, Koichiro NOGUCHI, Makoto NAGATA, |
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| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | A compact on-chip signal monitor circuit uses voltage mode sensing by a source follower circuit with small input device geometry, followed by a shared current bus. A prototype signal monitor circuit demonstrated a 1.1-GHz effective bandwidth for 1.0-V full-swing degital signals in a 90-nm CMOS technology, where the monitor used 2.5-V I/O CMOS transistors and occupied a 30μm×120μm silicon area. We also showed that such signal monitor circuits can be tailored to sense of power supply, ground, as well as full-swing logic signal wirings, and form an array with a single current potput. Therefore, an on-chip multi-channel signal monitor enables multiple-points as well as multiple-voltagedomain waveform acquisition for the purpose of the in-depth study of digital signal integrity. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | signal integrity / dynamic power supply noise / delay variation / on-chip monitor |
| Paper # | VLD2006-116,ICD2006-207 |
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| Conference Information | |
| Committee | ICD |
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| Conference Date | 2007/2/28(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
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| Chair | |
| Vice Chair | |
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| Paper Information | |
| Registration To | Integrated Circuits and Devices (ICD) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | An On-Chip Multi-Channel Rail-to-Rail Signal Monitoring Technique for Sub-100-nm Digital Signal Integrity |
| Sub Title (in English) | |
| Keyword(1) | signal integrity |
| Keyword(2) | dynamic power supply noise |
| Keyword(3) | delay variation |
| Keyword(4) | on-chip monitor |
| 1st Author's Name | Yoji BANDO |
| 1st Author's Affiliation | Department of Computer and Systems Engineering, Kobe University() |
| 2nd Author's Name | Koichiro NOGUCHI |
| 2nd Author's Affiliation | Department of Computer and Systems Engineering, Kobe University |
| 3rd Author's Name | Makoto NAGATA |
| 3rd Author's Affiliation | Department of Computer and Systems Engineering, Kobe University |
| Date | 2007-03-07 |
| Paper # | VLD2006-116,ICD2006-207 |
| Volume (vol) | vol.106 |
| Number (no) | 550 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |