Presentation 2007-03-07
Equivalent circuit codeling of guard ring structures for evaluation of substrate crosstalk isolation
Daisuke KOSAKA, Makoto NAGATA, Yoshitaka MURASAKA, Atsushi IWATA,
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Abstract(in English) A substrate-coupling equivalent circuit can be derived for an arbitrary guard ring test structure by way of F-matrix computation. The derived netlist represents a unified impedance network among multiple sites on a chip surface and allows circuit simulation to evaluate of isolation effects provided by guard rings. Geometry dependency of guard ring effects attributes to layout patterns of a test structure, including such as area of a guard ring as well as location distance from the circuit to be isolated by the guard ring. In addition, structural dependency arises from vertical impurity concentrations such as p^+, n^+, and deep n-well, which are generally available in a deep-submicron CMOS technology. The proposed simulation based prototyping technique of guard ring structures can include all these dependences and thus can be strongly helpful to establish isolation strategy against substrate coupling in a given technology, in an early stage of SoC developments.
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Keyword(in English) substrate crosstalk / deep n-well / F-matrix computation
Paper # VLD2006-115,ICD2006-206
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Conference Date 2007/2/28(1days)
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Registration To Integrated Circuits and Devices (ICD)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Equivalent circuit codeling of guard ring structures for evaluation of substrate crosstalk isolation
Sub Title (in English)
Keyword(1) substrate crosstalk
Keyword(2) deep n-well
Keyword(3) F-matrix computation
1st Author's Name Daisuke KOSAKA
1st Author's Affiliation Graduate School of Science and Technology, Kobe University, Department of Computer and Systems Engineering, Kobe University()
2nd Author's Name Makoto NAGATA
2nd Author's Affiliation Graduate School of Science and Technology, Kobe University, Department of Computer and Systems Engineering, Kobe University
3rd Author's Name Yoshitaka MURASAKA
3rd Author's Affiliation A-R-Tec Corporation
4th Author's Name Atsushi IWATA
4th Author's Affiliation A-R-Tec Corporation
Date 2007-03-07
Paper # VLD2006-115,ICD2006-206
Volume (vol) vol.106
Number (no) 550
Page pp.pp.-
#Pages 6
Date of Issue