Presentation | 2007-03-07 IP library retrieval system for design reuse Yeonbok LEE, GiLark PARK, Yuji ISHIKAWA, SeongWoon KANG, Shota WATANABE, Kenshu SETO, Satoshi KOMATSU, Hirofumi HAMAMURA, Masahiro FUJITA, |
---|---|
PDF Download Page | PDF download Page Link |
Abstract(in Japanese) | (See Japanese page) |
Abstract(in English) | IP(Intellectual Property) reuse technique has been considered as a powerful solution for crisis of design productivity, and is being researched actively. Among the issues on that technique, how quickly one can select suitable IPs for the target designs is a significantly important problem, and determines the effectiveness of reuse technique. In this paper, we propose na IP retrieval method using XQuery by assuming a design process with IP libraries consisting of IP specifications based on the format including XML description. We implemented the design reuse system including the proposed retrieval method. The effectiveness of the proposed system is shown in the case studies of the design process with selecting IPs from an IP library. |
Keyword(in Japanese) | (See Japanese page) |
Keyword(in English) | IP reuse / Search |
Paper # | VLD2006-114,ICD2006-205 |
Date of Issue |
Conference Information | |
Committee | ICD |
---|---|
Conference Date | 2007/2/28(1days) |
Place (in Japanese) | (See Japanese page) |
Place (in English) | |
Topics (in Japanese) | (See Japanese page) |
Topics (in English) | |
Chair | |
Vice Chair | |
Secretary | |
Assistant |
Paper Information | |
Registration To | Integrated Circuits and Devices (ICD) |
---|---|
Language | JPN |
Title (in Japanese) | (See Japanese page) |
Sub Title (in Japanese) | (See Japanese page) |
Title (in English) | IP library retrieval system for design reuse |
Sub Title (in English) | |
Keyword(1) | IP reuse |
Keyword(2) | Search |
1st Author's Name | Yeonbok LEE |
1st Author's Affiliation | Department of Electronics Engineering, School of Engineering, University of Tokyo() |
2nd Author's Name | GiLark PARK |
2nd Author's Affiliation | Samsung Electronics Co., Ltd. |
3rd Author's Name | Yuji ISHIKAWA |
3rd Author's Affiliation | Department of Electronics Engineering, School of Engineering, University of Tokyo |
4th Author's Name | SeongWoon KANG |
4th Author's Affiliation | Samsung Electronics Co., Ltd. |
5th Author's Name | Shota WATANABE |
5th Author's Affiliation | Department of Electronics Engineering, School of Engineering, University of Tokyo |
6th Author's Name | Kenshu SETO |
6th Author's Affiliation | VLSI Design and Education Center, University of Tokyo |
7th Author's Name | Satoshi KOMATSU |
7th Author's Affiliation | VLSI Design and Education Center, University of Tokyo |
8th Author's Name | Hirofumi HAMAMURA |
8th Author's Affiliation | Samsung Electronics Co., Ltd. |
9th Author's Name | Masahiro FUJITA |
9th Author's Affiliation | VLSI Design and Education Center, University of Tokyo |
Date | 2007-03-07 |
Paper # | VLD2006-114,ICD2006-205 |
Volume (vol) | vol.106 |
Number (no) | 550 |
Page | pp.pp.- |
#Pages | 6 |
Date of Issue |