Presentation 2007-02-02
Time-controlled single-electron transfer in single-gated asymmetric multiple tunnel junction arrays
Daniel MORARU, Yukinori ONO, Hiroshi INOKAWA, Kiyohito YOKO, Ratno NURYAD, Hiroya IKEDA, Michiharu TABE,
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Abstract(in English) We demonstrate both numerically and experimentally that time-controlled single-electron transfer can be achieved in single-gated systems with random multiple-tunnel-junctions (MTJ). Charge transfer is controlled by a ratchet-like free energy landscape which can be achieved with higher probability in random systems even if only one gate controls the potential in all the Coulomb islands. We confirm this behavior analytically through Monte Carlo simulations based on the orthodox theory of Coulomb blockade. Furthermore, we investigate the operation of Si nanowire field-effect transistors with several phosphorous impurities implanted in the channel. We show that the doping process leads to splitting the channel into a ID multiple-tunnel-junction array with naturally introduced parameter randomness. We report here the first experimental observation of time-controlled single-electron transfer achieved in ID MTJ arrays created by phosphorous dopants and suggest the importance of phosphorous for future Coulomb blockade device applications.
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Keyword(in English) Coulomb blockade / single-electron tunneling / single-electron turnstile / single-electron pump
Paper # ED2006-255,SDM2006-243
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Committee ED
Conference Date 2007/1/25(1days)
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Language ENG
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Time-controlled single-electron transfer in single-gated asymmetric multiple tunnel junction arrays
Sub Title (in English)
Keyword(1) Coulomb blockade
Keyword(2) single-electron tunneling
Keyword(3) single-electron turnstile
Keyword(4) single-electron pump
1st Author's Name Daniel MORARU
1st Author's Affiliation Research Institute of Electronics, Shizuoka University()
2nd Author's Name Yukinori ONO
2nd Author's Affiliation NTT Basic Research Laboratories, Nippon Telegraph and Telephone Corporation
3rd Author's Name Hiroshi INOKAWA
3rd Author's Affiliation Research Institute of Electronics, Shizuoka University
4th Author's Name Kiyohito YOKO
4th Author's Affiliation Research Institute of Electronics, Shizuoka University
5th Author's Name Ratno NURYAD
5th Author's Affiliation Research Institute of Electronics, Shizuoka University
6th Author's Name Hiroya IKEDA
6th Author's Affiliation Research Institute of Electronics, Shizuoka University
7th Author's Name Michiharu TABE
7th Author's Affiliation Research Institute of Electronics, Shizuoka University
Date 2007-02-02
Paper # ED2006-255,SDM2006-243
Volume (vol) vol.106
Number (no) 520
Page pp.pp.-
#Pages 6
Date of Issue