Presentation 2007-02-01
Analysis on Resonant-Tunneling 4RTD Logic Gate Operation
Hiroki OKUYAMA, Kentaro SUGAWARA, Tomohiko EBATA, Takao WAHO,
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Abstract(in English) An RTD has attractive characteristics such as ultrahigh-speed operation at room temperature and negative differential resistance. A 4RTD logic gate is recently proposed by using these attractive characteristics. Logic functions such as OR, AND, NOR and NAND are obtained by the 4RTD gate without using HEMTs. In this report, by using the critical current we propose a new method to analyze the 4RTD gate operation. It is confirmed that the critical current obtained by the present method agrees well with that obtained from SPICE simulation. Furthermore, according to the guideline suggested by the present method, 4RTD circuits with larger operation margin are successfully designed.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) resonant-tunneling / logic gate / ultrahigh-speed operation / RTD
Paper # ED2006-241,SDM2006-229
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Committee ED
Conference Date 2007/1/25(1days)
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Registration To Electron Devices (ED)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Analysis on Resonant-Tunneling 4RTD Logic Gate Operation
Sub Title (in English)
Keyword(1) resonant-tunneling
Keyword(2) logic gate
Keyword(3) ultrahigh-speed operation
Keyword(4) RTD
1st Author's Name Hiroki OKUYAMA
1st Author's Affiliation Faculty of Science and Technology, Sophia University()
2nd Author's Name Kentaro SUGAWARA
2nd Author's Affiliation Faculty of Science and Technology, Sophia University
3rd Author's Name Tomohiko EBATA
3rd Author's Affiliation Faculty of Science and Technology, Sophia University
4th Author's Name Takao WAHO
4th Author's Affiliation Faculty of Science and Technology, Sophia University
Date 2007-02-01
Paper # ED2006-241,SDM2006-229
Volume (vol) vol.106
Number (no) 520
Page pp.pp.-
#Pages 6
Date of Issue