| Presentation | 2007/2/2 Implementation of a Double Clock Pulse Method and Evaluation of Tolerance for Process Variations Yukiya MIURA, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | A clock signal distribution method that has a tolerance for an incorrect clock pulse generated on the clock signal line is proposed. The method secures the distribution of the clock signal by generating a double/multiple clock pulse and extracting a single pulse. The method is realized as an adapter circuit and is build in conventional synchronous digital systems. In this paper, we show an implementation example of the proposed method and evaluate its tolerance for process variations by circuit simulation. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | Clock signal / Crosstalk / Dependable design / Multiple clock pulse method / Synchronous circuits |
| Paper # | DC2006-89 |
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| Conference Information | |
| Committee | DC |
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| Conference Date | 2007/2/2(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
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| Paper Information | |
| Registration To | Dependable Computing (DC) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Implementation of a Double Clock Pulse Method and Evaluation of Tolerance for Process Variations |
| Sub Title (in English) | |
| Keyword(1) | Clock signal |
| Keyword(2) | Crosstalk |
| Keyword(3) | Dependable design |
| Keyword(4) | Multiple clock pulse method |
| Keyword(5) | Synchronous circuits |
| 1st Author's Name | Yukiya MIURA |
| 1st Author's Affiliation | Faculty of System Design, Tokyo Metropolitan University() |
| Date | 2007/2/2 |
| Paper # | DC2006-89 |
| Volume (vol) | vol.106 |
| Number (no) | 528 |
| Page | pp.pp.- |
| #Pages | 6 |
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