| Presentation | 2007/2/2 An Extended Class of Sequential Circuits with Acyclical Testability Nobuya OKA, ChiaYee OOI, Hideyuki ICHIHARA, Tomoo INOUE, Hideo FUJIWARA, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | The class of acyclically testable sequential circuits [7] is wider than that of acyclic sequential circuits, but its complexity is τ^2-bounded, which is equivalent to that of acyclic sequential circuits. In this work, we consider the extension of the class of acyclically testable sequential circuits. We propose a pair of justification thru trees and propagation thru trees instead of the thru trees presented in [7], and based on the thru tree pair, we show the extension of the class of acyclically testable sequential circuits. The class of extended acyclically testable sequential circuits properly includes that of acyclically testable sequential circuits. This implies that DFT for a given sequential circuit based on the extended acyclical testability requires small hardware overhead compared to that based on acyclical testability. Experimental results show the effectiveness of the DFT based on the extended acyclical testability. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | test generation / acyclic testability / design-for-testability / combinaitonal test generation complexity / τ^κ notation |
| Paper # | DC2006-88 |
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| Conference Information | |
| Committee | DC |
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| Conference Date | 2007/2/2(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
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| Paper Information | |
| Registration To | Dependable Computing (DC) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | An Extended Class of Sequential Circuits with Acyclical Testability |
| Sub Title (in English) | |
| Keyword(1) | test generation |
| Keyword(2) | acyclic testability |
| Keyword(3) | design-for-testability |
| Keyword(4) | combinaitonal test generation complexity |
| Keyword(5) | τ^κ notation |
| 1st Author's Name | Nobuya OKA |
| 1st Author's Affiliation | Guraduate of Information Sciences, Hiroshima City University() |
| 2nd Author's Name | ChiaYee OOI |
| 2nd Author's Affiliation | Faculty of Electrical Engineering, University of Technology Malaysia |
| 3rd Author's Name | Hideyuki ICHIHARA |
| 3rd Author's Affiliation | Faculty of Information Sciences, Hiroshima City University |
| 4th Author's Name | Tomoo INOUE |
| 4th Author's Affiliation | Faculty of Information Sciences, Hiroshima City University |
| 5th Author's Name | Hideo FUJIWARA |
| 5th Author's Affiliation | Graduate School of Information Science Nara Institute |
| Date | 2007/2/2 |
| Paper # | DC2006-88 |
| Volume (vol) | vol.106 |
| Number (no) | 528 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |