Presentation 2007-01-26
Status quo and future prospects of High-Performance and Low Power Si MOSFETs
Shin'ichiro KIMURA,
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Abstract(in English) Si MOSFET have been miniaturized so far based on the scaling theory, and significantly contributed to the progress of high performance and low power LSIs. Performance improvement was mainly achieved by shrinking the gate length of the MOSFET accompanied by threshold voltage reduction. However, reduction of the threshold voltage also causes power consumption increase due to increase of leakage current. In this article, new technologies such as strained Si MOSFETs and Fin-FETs are introduced, and how these new devices cope with the difficulties arising from the scaling are discussed from the viewpoint of the low power technology.
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Keyword(in English) Si / LSI / MOSFET / Low Power / Application of Strain / Fin-FET
Paper # SCE2006-34
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Conference Information
Committee SCE
Conference Date 2007/1/19(1days)
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Registration To Superconductive Electronics (SCE)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Status quo and future prospects of High-Performance and Low Power Si MOSFETs
Sub Title (in English)
Keyword(1) Si
Keyword(2) LSI
Keyword(3) MOSFET
Keyword(4) Low Power
Keyword(5) Application of Strain
Keyword(6) Fin-FET
1st Author's Name Shin'ichiro KIMURA
1st Author's Affiliation Central Research Laboratory, Hitachi Ltd.()
Date 2007-01-26
Paper # SCE2006-34
Volume (vol) vol.106
Number (no) 503
Page pp.pp.-
#Pages 6
Date of Issue