| Presentation | 2007-01-26 Development of Pipelined Bit-Serial Single-Flux-Quantum Microprocessors Masamitsu TANAKA, Yuki YAMANASHI, Naoki IRIE, Hee-joung PARK, Shingo IWASAKI, Kazuhiro TAKETOMI, Akira FUJIMAKI, Nobuyuki YOSHIKAWA, Hirotaka TERAI, Shinichi YOROZU, |
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| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | A pipelined single-flux-quantum microprocessor, called CORElβ has been designed and its perfect operations have been demonstrated by on-chip high-speed testing. High performance-to-power consumption ratio is achieved in this microprocessor, because bit-serial processing is employed for 16-bit instructions and 8-bit data and the high-throughput nature of single-flux-quantum circuit is utilized. In order to realize a complex pipeline processing effectively, we separated the clock signals for bit operations and instruction execution, and developed several component circuits including a controller designed with use of one-hot encoding, a register file which can be written and read independently, buffers for ease of the timing design. The CORElβ is a large-scale circuit made up of over 10,000 junctions. We eliminated the harmful effects due to the large bias current supplying by introducing fully superconductively-shielded cell library and an 8-mm square chip. The designed CORElβ has operated correctly up to 25GHz and 17GHz for bit operations of instructions and data, respectively, consuming 3.4mW powers. The peak performance has been estimated to be 1400 million operations per second (MOPS). |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | Superconductive Device / Single-Flux-Quantum Logic / SFQ / Microprocessor |
| Paper # | SCE2006-33 |
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| Conference Information | |
| Committee | SCE |
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| Conference Date | 2007/1/19(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
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| Paper Information | |
| Registration To | Superconductive Electronics (SCE) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Development of Pipelined Bit-Serial Single-Flux-Quantum Microprocessors |
| Sub Title (in English) | |
| Keyword(1) | Superconductive Device |
| Keyword(2) | Single-Flux-Quantum Logic |
| Keyword(3) | SFQ |
| Keyword(4) | Microprocessor |
| 1st Author's Name | Masamitsu TANAKA |
| 1st Author's Affiliation | Nagoya University() |
| 2nd Author's Name | Yuki YAMANASHI |
| 2nd Author's Affiliation | Yokohama National University |
| 3rd Author's Name | Naoki IRIE |
| 3rd Author's Affiliation | Nagoya University |
| 4th Author's Name | Hee-joung PARK |
| 4th Author's Affiliation | Yokohama National University |
| 5th Author's Name | Shingo IWASAKI |
| 5th Author's Affiliation | Nagoya University |
| 6th Author's Name | Kazuhiro TAKETOMI |
| 6th Author's Affiliation | Yokohama National University |
| 7th Author's Name | Akira FUJIMAKI |
| 7th Author's Affiliation | Nagoya University |
| 8th Author's Name | Nobuyuki YOSHIKAWA |
| 8th Author's Affiliation | Yokohama National University |
| 9th Author's Name | Hirotaka TERAI |
| 9th Author's Affiliation | NICT |
| 10th Author's Name | Shinichi YOROZU |
| 10th Author's Affiliation | NEC Corporation |
| Date | 2007-01-26 |
| Paper # | SCE2006-33 |
| Volume (vol) | vol.106 |
| Number (no) | 503 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |