| Presentation | 2007-01-26 Measurement of the delay time of SFQ logic cells by time-to-digital converters Kazunori NAKAMIYA, Takanobu NISHIGAI, Nobuyuki YOSHIKAWA, |
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| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | One of recent issues in the SFQ circuit design is the discrepancy in the delay time of logic cells between circuit simulations and measurement results. It was reported that the measured delay of the Josephson transmission line (JTL) is about 20% faster than circuit simulation results. The discrepancy was attributed to the parasitic inductance of the shunt resistor in the Josephson junction. In this study, we investigated the delay time of SFQ logic cells by using double-ring-oscillator-type time-to-digital converter (TDC). We measured the delay time of several basic logic cells in the CONNECT cell library. The measured results were compared with the simulation results taking into account the parasitic inductance of the shunt resistor. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | SFQ / TDC / delay time / logic cell / superconductive integrated circuit |
| Paper # | SCE2006-30 |
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| Conference Information | |
| Committee | SCE |
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| Conference Date | 2007/1/19(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
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| Paper Information | |
| Registration To | Superconductive Electronics (SCE) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Measurement of the delay time of SFQ logic cells by time-to-digital converters |
| Sub Title (in English) | |
| Keyword(1) | SFQ |
| Keyword(2) | TDC |
| Keyword(3) | delay time |
| Keyword(4) | logic cell |
| Keyword(5) | superconductive integrated circuit |
| 1st Author's Name | Kazunori NAKAMIYA |
| 1st Author's Affiliation | Department of Electrical and Computer Engineering, Yokohama National University() |
| 2nd Author's Name | Takanobu NISHIGAI |
| 2nd Author's Affiliation | Department of Electrical and Computer Engineering, Yokohama National University |
| 3rd Author's Name | Nobuyuki YOSHIKAWA |
| 3rd Author's Affiliation | Department of Electrical and Computer Engineering, Yokohama National University |
| Date | 2007-01-26 |
| Paper # | SCE2006-30 |
| Volume (vol) | vol.106 |
| Number (no) | 503 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |