Presentation | 2007-01-18 Adoption and Evaluation of FPGA Partial Reconfiguration for a Run-time Reconfigurable System Yukinobu KIYOTA, Taiichiro YATSUNAMI, Takeru KISANUKI, Hideaki YOSHIHIRO, Morihiro KUGA, Toshinori SUEYOSHI, |
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Abstract(in Japanese) | (See Japanese page) |
Abstract(in English) | FPGA partial reconfiguration is the technique which make FPGA more flexible. We have studied about partial reconfiguration and built the run-time reconfigurable system using the FPGA with an embedded proccesor and the technique we can use at present. This paper considers the feature of the system through its evaluation. We used Virtex-II Pro and divided it two parts. The system reconfigure the one part through the proccesor in another part. Even if it includes the time required for the reconfiguration, the performance of our system can be expected 4-6 times faster than the software processing of some graphics programs. |
Keyword(in Japanese) | (See Japanese page) |
Keyword(in English) | FPGA / Partial Reconfiguration / Run-time Reconfiguration / FPGA with an embedded proccesor |
Paper # | VLD2006-103,CPSY2006-74,RECONF2006-74 |
Date of Issue |
Conference Information | |
Committee | RECONF |
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Conference Date | 2007/1/11(1days) |
Place (in Japanese) | (See Japanese page) |
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Topics (in Japanese) | (See Japanese page) |
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Paper Information | |
Registration To | Reconfigurable Systems (RECONF) |
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Language | JPN |
Title (in Japanese) | (See Japanese page) |
Sub Title (in Japanese) | (See Japanese page) |
Title (in English) | Adoption and Evaluation of FPGA Partial Reconfiguration for a Run-time Reconfigurable System |
Sub Title (in English) | |
Keyword(1) | FPGA |
Keyword(2) | Partial Reconfiguration |
Keyword(3) | Run-time Reconfiguration |
Keyword(4) | FPGA with an embedded proccesor |
1st Author's Name | Yukinobu KIYOTA |
1st Author's Affiliation | Department of Mathematics and Computer Science, Graduate School of Science and Technology, Kumamoto University() |
2nd Author's Name | Taiichiro YATSUNAMI |
2nd Author's Affiliation | Department of Mathematics and Computer Science, Graduate School of Science and Technology, Kumamoto University |
3rd Author's Name | Takeru KISANUKI |
3rd Author's Affiliation | Department of Mathematics and Computer Science, Graduate School of Science and Technology, Kumamoto University |
4th Author's Name | Hideaki YOSHIHIRO |
4th Author's Affiliation | Department of Mathematics and Computer Science, Graduate School of Science and Technology, Kumamoto University |
5th Author's Name | Morihiro KUGA |
5th Author's Affiliation | Department of Mathematics and Computer Science, Graduate School of Science and Technology, Kumamoto University |
6th Author's Name | Toshinori SUEYOSHI |
6th Author's Affiliation | Department of Mathematics and Computer Science, Graduate School of Science and Technology, Kumamoto University |
Date | 2007-01-18 |
Paper # | VLD2006-103,CPSY2006-74,RECONF2006-74 |
Volume (vol) | vol.106 |
Number (no) | 458 |
Page | pp.pp.- |
#Pages | 6 |
Date of Issue |