Presentation 2007-01-17
Achieve a preprocessing part of auditory sense with circuit
Yuya USAMI, Hidehiko ARAI, Etu SOU, Kazushi TAKAHASHI, Toshitaka NAGANO, Masatoshi SEKINE,
PDF Download Page PDF download Page Link
Abstract(in Japanese) (See Japanese page)
Abstract(in English) Auditory sense of human can immediately extract a feature quantity and location that sound happened from sound that flows in ears using robust preprocessing. In this research,we paid attention to cochlea that was a part of the auditory organ, and proposed method that got cochlear function with a logical circuit. Concretely speaking,we compose the model that simulated cochlea of the circuit by verilog-HDL. By implementing this circuit in an FPGA on our hwModule board, we make a digital circuit of a preprocessing part of auditory sense. This aim is to get a feature quantity of sound named "Sound Image". We get "Sound Image" that obtain by applying proposed method to vowel of Japanese, and Template Matching using "Sound Image" is performed for the vowel recognition. As a result,the vowel recognition was possible by "Sound Image", and we could confirm the utility of proposed method.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) Auditory Model / Multi-Resolution Analysis / Template・Macthing / Vowel Recognition
Paper # VLD2006-85,CPSY2006-56,RECONF2006-56
Date of Issue

Conference Information
Committee RECONF
Conference Date 2007/1/10(1days)
Place (in Japanese) (See Japanese page)
Place (in English)
Topics (in Japanese) (See Japanese page)
Topics (in English)
Chair
Vice Chair
Secretary
Assistant

Paper Information
Registration To Reconfigurable Systems (RECONF)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Achieve a preprocessing part of auditory sense with circuit
Sub Title (in English)
Keyword(1) Auditory Model
Keyword(2) Multi-Resolution Analysis
Keyword(3) Template・Macthing
Keyword(4) Vowel Recognition
1st Author's Name Yuya USAMI
1st Author's Affiliation Faculty of Engineering, Tokyo University of Agriculture and Technology()
2nd Author's Name Hidehiko ARAI
2nd Author's Affiliation Faculty of Engineering, Tokyo University of Agriculture and Technology
3rd Author's Name Etu SOU
3rd Author's Affiliation Faculty of Engineering, Tokyo University of Agriculture and Technology
4th Author's Name Kazushi TAKAHASHI
4th Author's Affiliation Faculty of Engineering, Tokyo University of Agriculture and Technology
5th Author's Name Toshitaka NAGANO
5th Author's Affiliation Faculty of Engineering, Tokyo University of Agriculture and Technology
6th Author's Name Masatoshi SEKINE
6th Author's Affiliation Faculty of Engineering, Tokyo University of Agriculture and Technology
Date 2007-01-17
Paper # VLD2006-85,CPSY2006-56,RECONF2006-56
Volume (vol) vol.106
Number (no) 457
Page pp.pp.-
#Pages 6
Date of Issue