| Presentation | 2007-01-19 SoC macro-block diagnosis using extracted layout information Katsuyoshi MIURA, Koji NAKAMAE, |
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| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | A SoC macro-block diagnostic method using a netlist extracted from layout data is proposed. A hard IP core that does not have the pre-designed netlist is diagnosed by using a netlist extracted from the layout. A prober is used after the device is diagnosed by using output patterns (fail log). A netlist is extracted only from the upstream logic cone area of the faulty output terminals. Therefore the size of circuit under diagnosis is reduced. Our method uses the test pattern for diagnosis and modifies the score of the diagnostic result by considering resistance and parasitic capacitance extracted from the layout in order to improve diagnostic resolution and reduce the number of the probing operations. We applied our method to the layout synthesized from the ISCAS'85 benchmark circuits in order to show its validity. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | VLSI / fault diagnosis / circuit extraction / prober / test pattern |
| Paper # | CPM2006-147,ICD2006-189 |
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| Conference Information | |
| Committee | ICD |
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| Conference Date | 2007/1/11(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Chair | |
| Vice Chair | |
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| Paper Information | |
| Registration To | Integrated Circuits and Devices (ICD) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | SoC macro-block diagnosis using extracted layout information |
| Sub Title (in English) | |
| Keyword(1) | VLSI |
| Keyword(2) | fault diagnosis |
| Keyword(3) | circuit extraction |
| Keyword(4) | prober |
| Keyword(5) | test pattern |
| 1st Author's Name | Katsuyoshi MIURA |
| 1st Author's Affiliation | Dept. Information Systems Eng., Grad. Sch. Information Science and Technology, Osaka University() |
| 2nd Author's Name | Koji NAKAMAE |
| 2nd Author's Affiliation | Dept. Information Systems Eng., Grad. Sch. Information Science and Technology, Osaka University |
| Date | 2007-01-19 |
| Paper # | CPM2006-147,ICD2006-189 |
| Volume (vol) | vol.106 |
| Number (no) | 468 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |