| Presentation | 2007/1/19 A 45nm High Performance Bulk Logic Platform Technology (CMOS6) using Ultra High NA (1.07) Immersion Lithography with Hybrid Dual-Damascene Structure and Porous Low-k BEOL H. Nii, T. Sanuki, Y. Okayama, K. Ota, T. Iwamoto, T. Fujimaki, T. Kimura, R. Watanabe, T. Komoda, A. Eiho, K. Aikawa, H. Yamaguchi, R. Morimoto, K. Ohshima, T. Yokoyama, T. Matsumoto, K. Hachimine, Y. Sogo, S. Shino, S. Kanai, T. Yamazaki, S. Takahashi, H. Maeda, T. Iwata, K. Ohno, Y. Takegawa, A. Oishi, M. Togo, K. Fukasaku, Y. Takasu, H. Yamasaki, H. Inokuma, K. Matsuo, T. Sato, M. Nakazawa, T. Katagiri, K. Nakazawa, T. Shinyama, T. Tetsuka, S. Fujita, Y. Kagawa, K. Nagaoka, S. Muramatsu, S. Iwasa, S. Mimotogi, K. Yoshida, K. Sunouchi, M. Iwai, M. Saito, M. Ikeda, Y. Enomoto, H. Naruse, K. Imai, S. Yamada, N. Nagashima, T. Kuwata, F. Matsuoka, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | We present the state-of-the-art 45nm high performance bulk logic platform technology which utilizes, for the first time in the industry, ultra high NA (1.07) immersion lithography to realize highly down-scaled chip size. Fully renovated MOSFET integration scheme which features reversed extension and SD diffusion formation is established to meet Vt roll-off requirement with excellent transistor performance of Ion=1100uA/um for nFET and Ion=700uA/um for PFET at Ioff=100nA/um. Also, we achieved excellent BEOL reliability and manufacturability by implementing hybrid dual-damascene (DD) structure with porous low-k film (keff=2.7). |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | 45nm CMOS / System LSI / Immersion lithography / UHDRSAM / Hybrid dual-damascene |
| Paper # | SDM2006-219 |
| Date of Issue |
| Conference Information | |
| Committee | SDM |
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| Conference Date | 2007/1/19(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Chair | |
| Vice Chair | |
| Secretary | |
| Assistant | |
| Paper Information | |
| Registration To | Silicon Device and Materials (SDM) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | A 45nm High Performance Bulk Logic Platform Technology (CMOS6) using Ultra High NA (1.07) Immersion Lithography with Hybrid Dual-Damascene Structure and Porous Low-k BEOL |
| Sub Title (in English) | |
| Keyword(1) | 45nm CMOS |
| Keyword(2) | System LSI |
| Keyword(3) | Immersion lithography |
| Keyword(4) | UHDRSAM |
| Keyword(5) | Hybrid dual-damascene |
| 1st Author's Name | H. Nii |
| 1st Author's Affiliation | System LSI Division 1, Toshiba Corporation() |
| 2nd Author's Name | T. Sanuki |
| 2nd Author's Affiliation | System LSI Division 1, Toshiba Corporation |
| 3rd Author's Name | Y. Okayama |
| 3rd Author's Affiliation | System LSI Division 1, Toshiba Corporation |
| 4th Author's Name | K. Ota |
| 4th Author's Affiliation | SONY Corporation |
| 5th Author's Name | T. Iwamoto |
| 5th Author's Affiliation | NEC Electronics Corporation |
| 6th Author's Name | T. Fujimaki |
| 6th Author's Affiliation | System LSI Division 1, Toshiba Corporation |
| 7th Author's Name | T. Kimura |
| 7th Author's Affiliation | System LSI Division 1, Toshiba Corporation |
| 8th Author's Name | R. Watanabe |
| 8th Author's Affiliation | System LSI Division 1, Toshiba Corporation |
| 9th Author's Name | T. Komoda |
| 9th Author's Affiliation | System LSI Division 1, Toshiba Corporation |
| 10th Author's Name | A. Eiho |
| 10th Author's Affiliation | System LSI Division 1, Toshiba Corporation |
| 11th Author's Name | K. Aikawa |
| 11th Author's Affiliation | System LSI Division 1, Toshiba Corporation |
| 12th Author's Name | H. Yamaguchi |
| 12th Author's Affiliation | System LSI Division 1, Toshiba Corporation |
| 13th Author's Name | R. Morimoto |
| 13th Author's Affiliation | SONY Corporation |
| 14th Author's Name | K. Ohshima |
| 14th Author's Affiliation | SONY Corporation |
| 15th Author's Name | T. Yokoyama |
| 15th Author's Affiliation | SONY Corporation |
| 16th Author's Name | T. Matsumoto |
| 16th Author's Affiliation | SONY Corporation |
| 17th Author's Name | K. Hachimine |
| 17th Author's Affiliation | SONY Corporation |
| 18th Author's Name | Y. Sogo |
| 18th Author's Affiliation | SONY Corporation |
| 19th Author's Name | S. Shino |
| 19th Author's Affiliation | SONY Corporation |
| 20th Author's Name | S. Kanai |
| 20th Author's Affiliation | SONY Corporation |
| 21th Author's Name | T. Yamazaki |
| 21th Author's Affiliation | SONY Corporation |
| 22th Author's Name | S. Takahashi |
| 22th Author's Affiliation | SONY Corporation |
| 23th Author's Name | H. Maeda |
| 23th Author's Affiliation | SONY Corporation |
| 24th Author's Name | T. Iwata |
| 24th Author's Affiliation | SONY Corporation |
| 25th Author's Name | K. Ohno |
| 25th Author's Affiliation | SONY Corporation |
| 26th Author's Name | Y. Takegawa |
| 26th Author's Affiliation | System LSI Division 1, Toshiba Corporation |
| 27th Author's Name | A. Oishi |
| 27th Author's Affiliation | System LSI Division 1, Toshiba Corporation |
| 28th Author's Name | M. Togo |
| 28th Author's Affiliation | NEC Electronics Corporation |
| 29th Author's Name | K. Fukasaku |
| 29th Author's Affiliation | SONY Corporation |
| 30th Author's Name | Y. Takasu |
| 30th Author's Affiliation | Process and Manufacturing Engineering Center, Toshiba Corporation |
| 31th Author's Name | H. Yamasaki |
| 31th Author's Affiliation | Process and Manufacturing Engineering Center, Toshiba Corporation |
| 32th Author's Name | H. Inokuma |
| 32th Author's Affiliation | Process and Manufacturing Engineering Center, Toshiba Corporation |
| 33th Author's Name | K. Matsuo |
| 33th Author's Affiliation | Process and Manufacturing Engineering Center, Toshiba Corporation |
| 34th Author's Name | T. Sato |
| 34th Author's Affiliation | Process and Manufacturing Engineering Center, Toshiba Corporation |
| 35th Author's Name | M. Nakazawa |
| 35th Author's Affiliation | SONY Corporation |
| 36th Author's Name | T. Katagiri |
| 36th Author's Affiliation | SONY Corporation |
| 37th Author's Name | K. Nakazawa |
| 37th Author's Affiliation | SONY Corporation |
| 38th Author's Name | T. Shinyama |
| 38th Author's Affiliation | SONY Corporation |
| 39th Author's Name | T. Tetsuka |
| 39th Author's Affiliation | SONY Corporation |
| 40th Author's Name | S. Fujita |
| 40th Author's Affiliation | SONY Corporation |
| 41th Author's Name | Y. Kagawa |
| 41th Author's Affiliation | SONY Corporation |
| 42th Author's Name | K. Nagaoka |
| 42th Author's Affiliation | SONY Corporation |
| 43th Author's Name | S. Muramatsu |
| 43th Author's Affiliation | NEC Electronics Corporation |
| 44th Author's Name | S. Iwasa |
| 44th Author's Affiliation | Process and Manufacturing Engineering Center, Toshiba Corporation |
| 45th Author's Name | S. Mimotogi |
| 45th Author's Affiliation | Process and Manufacturing Engineering Center, Toshiba Corporation |
| 46th Author's Name | K. Yoshida |
| 46th Author's Affiliation | System LSI Division 1, Toshiba Corporation |
| 47th Author's Name | K. Sunouchi |
| 47th Author's Affiliation | System LSI Division 1, Toshiba Corporation |
| 48th Author's Name | M. Iwai |
| 48th Author's Affiliation | System LSI Division 1, Toshiba Corporation |
| 49th Author's Name | M. Saito |
| 49th Author's Affiliation | SONY Corporation |
| 50th Author's Name | M. Ikeda |
| 50th Author's Affiliation | NEC Electronics Corporation |
| 51th Author's Name | Y. Enomoto |
| 51th Author's Affiliation | SONY Corporation |
| 52th Author's Name | H. Naruse |
| 52th Author's Affiliation | Process and Manufacturing Engineering Center, Toshiba Corporation |
| 53th Author's Name | K. Imai |
| 53th Author's Affiliation | NEC Electronics Corporation |
| 54th Author's Name | S. Yamada |
| 54th Author's Affiliation | System LSI Division 1, Toshiba Corporation |
| 55th Author's Name | N. Nagashima |
| 55th Author's Affiliation | SONY Corporation |
| 56th Author's Name | T. Kuwata |
| 56th Author's Affiliation | NEC Electronics Corporation |
| 57th Author's Name | F. Matsuoka |
| 57th Author's Affiliation | System LSI Division 1, Toshiba Corporation |
| Date | 2007/1/19 |
| Paper # | SDM2006-219 |
| Volume (vol) | vol.106 |
| Number (no) | 504 |
| Page | pp.pp.- |
| #Pages | 4 |
| Date of Issue | |