| Presentation | 2006-11-30 Waveform measurement of LSI by using on-chip-probe Shinichi KAWAGOE, Masayoshi TACHIBANA, |
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| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | The effects of parasitic inductance of transmission line are becoming important factor in approximating signal delay in digital circuit due to the miniaturization of a design rule. Therefore more efficient methods are to be needed than before. This paper presents a test methodology to approximate the transmission delay, which contains FET probe on chip with several kinds of strip lines aimed at gaining the basic data of transmission delay. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | transmission delay / FET probe / strip line |
| Paper # | VLD2006-78,DC2006-65 |
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| Conference Information | |
| Committee | VLD |
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| Conference Date | 2006/11/23(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
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| Paper Information | |
| Registration To | VLSI Design Technologies (VLD) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Waveform measurement of LSI by using on-chip-probe |
| Sub Title (in English) | |
| Keyword(1) | transmission delay |
| Keyword(2) | FET probe |
| Keyword(3) | strip line |
| 1st Author's Name | Shinichi KAWAGOE |
| 1st Author's Affiliation | Electronic and Photonic Systems Engineering Course, Kochi University of Technology() |
| 2nd Author's Name | Masayoshi TACHIBANA |
| 2nd Author's Affiliation | Electronic and Photonic Systems Engineering Course, Kochi University of Technology |
| Date | 2006-11-30 |
| Paper # | VLD2006-78,DC2006-65 |
| Volume (vol) | vol.106 |
| Number (no) | 389 |
| Page | pp.pp.- |
| #Pages | 5 |
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