Presentation | 2006-11-10 Consistency analysis between state charts and sequence charts by model checking Tetsuo HASEGAWA, Yoshiaki FUKAZAWA, |
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Abstract(in Japanese) | (See Japanese page) |
Abstract(in English) | In the software field of embedded systems, where many kinds of systems must be developed in a short term and low-cost, a model checking that is one of automatic design verification techniques is expected to be easy to use for a software designers. In this paper, a method generating an observer for the model checking tool UPPAAL from sequence charts, which is usually made by designers, is proposed. Also it is reported the result of applying this method to a communication system. |
Keyword(in Japanese) | (See Japanese page) |
Keyword(in English) | model checking / real time system / UML / state chart / sequence chart |
Paper # | AI2006-19 |
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Committee | AI |
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Conference Date | 2006/11/3(1days) |
Place (in Japanese) | (See Japanese page) |
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Topics (in Japanese) | (See Japanese page) |
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Registration To | Artificial Intelligence and Knowledge-Based Processing (AI) |
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Language | JPN |
Title (in Japanese) | (See Japanese page) |
Sub Title (in Japanese) | (See Japanese page) |
Title (in English) | Consistency analysis between state charts and sequence charts by model checking |
Sub Title (in English) | |
Keyword(1) | model checking |
Keyword(2) | real time system |
Keyword(3) | UML |
Keyword(4) | state chart |
Keyword(5) | sequence chart |
1st Author's Name | Tetsuo HASEGAWA |
1st Author's Affiliation | Waseda University:Toshiba corporation() |
2nd Author's Name | Yoshiaki FUKAZAWA |
2nd Author's Affiliation | Waseda University |
Date | 2006-11-10 |
Paper # | AI2006-19 |
Volume (vol) | vol.106 |
Number (no) | 340 |
Page | pp.pp.- |
#Pages | 6 |
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