Presentation 2006-11-28
Proposal of a Behavioral Synthesis Method for Asynchronous Circuits in Budled-data Implementation
Naohiro HAMADA, Takao KONISHI, Hiroshi SAITO, Tomohiro YONEDA, Takashi NANYA,
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Abstract(in English) In this paper, we propose a behavioral synthesis method for asynchronous circuits in bundled data-im-plementation which synthesizes an asynchronous logic circuit from a behavioral description written in a restricted C language. We evaluate the proposed method through a case study where the idctrow function in MPEG2 is synthesized.
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Paper # VLD2006-63,DC2006-50
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Conference Date 2006/11/21(1days)
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Language JPN
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Title (in English) Proposal of a Behavioral Synthesis Method for Asynchronous Circuits in Budled-data Implementation
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1st Author's Name Naohiro HAMADA
1st Author's Affiliation Dept. of Computer Systems, The Graduate School of The University of Aizu()
2nd Author's Name Takao KONISHI
2nd Author's Affiliation Dept. of Computer Hardware, The University of Aizu
3rd Author's Name Hiroshi SAITO
3rd Author's Affiliation Dept. of Computer Hardware, The University of Aizu
4th Author's Name Tomohiro YONEDA
4th Author's Affiliation National Institute of Informatics
5th Author's Name Takashi NANYA
5th Author's Affiliation Research Center for Advanced Science and Technology, The University of Tokyo
Date 2006-11-28
Paper # VLD2006-63,DC2006-50
Volume (vol) vol.106
Number (no) 390
Page pp.pp.-
#Pages 6
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