Presentation 2006-10-05
GaN Vertical Schottky Barrier Diodes with Pseudo-SuperJunction Structures
Kazushi NAKAZAWA, Hiroaki UENO, Hisayoshi MATSUO, Manabu YANAGIHARA, Yasuhiro UEMOTO, Tetsuzo UEDA, Tsuyoshi TANAKA,
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Abstract(in English) Gallium Nitride (GaN) has been widely investigated for future high power devices owing to its high breakdown field with high electron mobility. Schottky barrier diodes (SBDs) are indispensable in power switching systems, for which high breakdown voltage are strongly required. However, the improvement of breakdown voltage is limited in case of GaN because of high residual carrier concentration. We have developed a new technique to increase breakdown voltage of vertical GaN SBDs utilizing so-called pseudo-superjunction (PSJ) structures, in which narrow channel and selectively ion-implanted insulating region is alternately stacked. The PSJ structure enables higher breakdown voltages by the relaxation of electric field at the surface together with deeper depletion layers. In addition, the PSJ-SBD enables low on-state voltage keeping the high breakdown voltage owing to relatively high carrier concentration in the channel. The obtained breakdown voltage is over twice as high as that of the conventional SBD with keeping low on-state voltage of 0.93V.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) GaN / Schottky barrier diode (SBD) / vertical structure / breakdown voltage / on-state voltage
Paper # ED2006-156,CPM2006-93,LQE2006-60
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Conference Information
Committee LQE
Conference Date 2006/9/28(1days)
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Registration To Lasers and Quantum Electronics (LQE)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) GaN Vertical Schottky Barrier Diodes with Pseudo-SuperJunction Structures
Sub Title (in English)
Keyword(1) GaN
Keyword(2) Schottky barrier diode (SBD)
Keyword(3) vertical structure
Keyword(4) breakdown voltage
Keyword(5) on-state voltage
1st Author's Name Kazushi NAKAZAWA
1st Author's Affiliation Semiconductor Device Research Center, Semiconductor Company, Matsushita Electric Industrial Co., Ltd.()
2nd Author's Name Hiroaki UENO
2nd Author's Affiliation Semiconductor Device Research Center, Semiconductor Company, Matsushita Electric Industrial Co., Ltd.
3rd Author's Name Hisayoshi MATSUO
3rd Author's Affiliation Semiconductor Device Research Center, Semiconductor Company, Matsushita Electric Industrial Co., Ltd.
4th Author's Name Manabu YANAGIHARA
4th Author's Affiliation Semiconductor Device Research Center, Semiconductor Company, Matsushita Electric Industrial Co., Ltd.
5th Author's Name Yasuhiro UEMOTO
5th Author's Affiliation Semiconductor Device Research Center, Semiconductor Company, Matsushita Electric Industrial Co., Ltd.
6th Author's Name Tetsuzo UEDA
6th Author's Affiliation Semiconductor Device Research Center, Semiconductor Company, Matsushita Electric Industrial Co., Ltd.
7th Author's Name Tsuyoshi TANAKA
7th Author's Affiliation Semiconductor Device Research Center, Semiconductor Company, Matsushita Electric Industrial Co., Ltd.
Date 2006-10-05
Paper # ED2006-156,CPM2006-93,LQE2006-60
Volume (vol) vol.106
Number (no) 271
Page pp.pp.-
#Pages 5
Date of Issue