Presentation 2006-08-18
The Impact of Random Telegraph Signals on the Scaling of Multilevel Flash Memories
Hideaki KURATA, Kazuo OTSUGA, Akira KOTABE, Shinya KAJIYAMA, Taro OSABE, Yoshitaka SASAGO, Shunichi NARUMI, Kenji TOKAMI, Shiro KAMOHARA, Osamu TSUCHIYA,
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Abstract(in English) This paper describes for the first time the observation of the threshold voltage (Vth) fluctuation due to random telegraph signal (RTS) in flash memory. We acquired large amount of data of Vth fluctuation by using a 90-nm node memory array and confirmed that a few memory cells have large RTS fluctuation exceeding 0.2V. We also found that the tail bits are generated due to RTS in multilevel flash operation by simulation and measurement results. The amount of Vth broadening due to the tail bits becomes larger as the scaling advances, and reaches to more than 0.3V in 45-nm node. Thus the RTS becomes prominent issue for the design of multilevel flash memory in 45-nm node and beyond.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) Random telegraph signal / Flash memory / Multilevel cell technology / Vth fluctuation
Paper # SDM2006-153,ICD2006-107
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Conference Date 2006/8/10(1days)
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Registration To Integrated Circuits and Devices (ICD)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) The Impact of Random Telegraph Signals on the Scaling of Multilevel Flash Memories
Sub Title (in English)
Keyword(1) Random telegraph signal
Keyword(2) Flash memory
Keyword(3) Multilevel cell technology
Keyword(4) Vth fluctuation
1st Author's Name Hideaki KURATA
1st Author's Affiliation Central Research Laboratory, Hitachi, Ltd.()
2nd Author's Name Kazuo OTSUGA
2nd Author's Affiliation Central Research Laboratory, Hitachi, Ltd.
3rd Author's Name Akira KOTABE
3rd Author's Affiliation Central Research Laboratory, Hitachi, Ltd.
4th Author's Name Shinya KAJIYAMA
4th Author's Affiliation Central Research Laboratory, Hitachi, Ltd.
5th Author's Name Taro OSABE
5th Author's Affiliation Central Research Laboratory, Hitachi, Ltd.
6th Author's Name Yoshitaka SASAGO
6th Author's Affiliation Central Research Laboratory, Hitachi, Ltd.
7th Author's Name Shunichi NARUMI
7th Author's Affiliation Renesas Technology Corp.
8th Author's Name Kenji TOKAMI
8th Author's Affiliation Renesas Technology Corp.
9th Author's Name Shiro KAMOHARA
9th Author's Affiliation Renesas Technology Corp.
10th Author's Name Osamu TSUCHIYA
10th Author's Affiliation Renesas Technology Corp.
Date 2006-08-18
Paper # SDM2006-153,ICD2006-107
Volume (vol) vol.106
Number (no) 207
Page pp.pp.-
#Pages 6
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