| Presentation | 2006-08-18 A Vth-Variation-Tolerant SRAM with 0.3-V Minimum Operation Voltage for Memory-Rich SoC under DVS Environment Hiroki NOGUCHI, Yasuhiro MORITA, Hidehiro FUJIWARA, Kentaro KAWAKAMI, Junichi MIYAKOSHI, Shinji MIKAMI, Koji NII, Hiroshi KAWAGUCHI, Masahiko YOSHIMOTO, |
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| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | We propose a voltage control scheme for 6T SRAM cells that makes a minimum operation voltage down to 0.3V under DVS environment. A supply voltage to the memory cells and wordline drivers, bitline voltage, and body bias voltage of load pMOSFETs are controlled according to read and write operations, which secures operation margins even at a low operation voltage. A self-aligned timing control with a dummy wordline and its feedback is also introduced to guarantee stable operation in a wide range of the supply voltage. A measurement result of a 64-kb SRAM in a 90-nm process technology shows that a power reduction of 30% can be achieved at 100MHz. Area overhead is 5.6%. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | SRAM / DVS / Vth-variation-tolerant / low power |
| Paper # | SDM2006-152,ICD2006-106 |
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| Conference Information | |
| Committee | ICD |
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| Conference Date | 2006/8/10(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Chair | |
| Vice Chair | |
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| Paper Information | |
| Registration To | Integrated Circuits and Devices (ICD) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | A Vth-Variation-Tolerant SRAM with 0.3-V Minimum Operation Voltage for Memory-Rich SoC under DVS Environment |
| Sub Title (in English) | |
| Keyword(1) | SRAM |
| Keyword(2) | DVS |
| Keyword(3) | Vth-variation-tolerant |
| Keyword(4) | low power |
| 1st Author's Name | Hiroki NOGUCHI |
| 1st Author's Affiliation | Graduate School of Science and Technology, Kobe University() |
| 2nd Author's Name | Yasuhiro MORITA |
| 2nd Author's Affiliation | Graduate School of Natural Science and Technology, Kanazawa University |
| 3rd Author's Name | Hidehiro FUJIWARA |
| 3rd Author's Affiliation | Graduate School of Science and Technology, Kobe University |
| 4th Author's Name | Kentaro KAWAKAMI |
| 4th Author's Affiliation | Graduate School of Science and Technology, Kobe University |
| 5th Author's Name | Junichi MIYAKOSHI |
| 5th Author's Affiliation | Graduate School of Science and Technology, Kobe University |
| 6th Author's Name | Shinji MIKAMI |
| 6th Author's Affiliation | Graduate School of Natural Science and Technology, Kanazawa University |
| 7th Author's Name | Koji NII |
| 7th Author's Affiliation | Graduate School of Science and Technology, Kobe University |
| 8th Author's Name | Hiroshi KAWAGUCHI |
| 8th Author's Affiliation | Graduate School of Science and Technology, Kobe University |
| 9th Author's Name | Masahiko YOSHIMOTO |
| 9th Author's Affiliation | Graduate School of Science and Technology, Kobe University |
| Date | 2006-08-18 |
| Paper # | SDM2006-152,ICD2006-106 |
| Volume (vol) | vol.106 |
| Number (no) | 207 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |