Presentation 2006-08-18
High Performance Dual Metal Gate CMOS with High Mobility and Low Threshold Voltage Applicable to Bulk CMOS Technology
S. Yamaguchi, K. Tai, T. Hirano, T. Ando, S. Hiyama, J. Wang, Y. Hagimoto, Y. Nagahama, T. Kato, K. Nagano, M. Yamanaka, S. Terauchi, S. Kanda, R. Yamamoto, Y. Tateshita, Y. Tagawa, H. Iwamoto, M. Saito, N. Nagashima, S. Kadomura,
PDF Download Page PDF download Page Link
Abstract(in Japanese) (See Japanese page)
Abstract(in English) We have developed a dual metal gate CMOS technology with HfSi_x for nMOS and Ru for pMOS on HfO_2 gate dielectric. These gate stacks show high mobility (100% of universal mobility for electron, 80% for hole at high fields) down to T_ of 1.7nm and symmetrical low V_t equivalent to poly-Si/SiO_2. As a result, high drive currents of 780uA/um and 265uA/um at I_=1nA/um are achieved for V_
=1.0V in L_g=60nm nMOS and pMOS, respectively. We have applied the mobility enhancement technology to the Ru/HfO_2 pMOS by utilizing (110)-substrate. As a result, an excellent drive current of 400uA/um (151% improvement over (100)-p^+poly-Si/SiO_2) is achieved.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) metal gate / High-k / Gate-Last process / (110)-substrate
Paper # SDM2006-146,ICD2006-100
Date of Issue

Conference Information
Committee ICD
Conference Date 2006/8/10(1days)
Place (in Japanese) (See Japanese page)
Place (in English)
Topics (in Japanese) (See Japanese page)
Topics (in English)
Chair
Vice Chair
Secretary
Assistant

Paper Information
Registration To Integrated Circuits and Devices (ICD)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) High Performance Dual Metal Gate CMOS with High Mobility and Low Threshold Voltage Applicable to Bulk CMOS Technology
Sub Title (in English)
Keyword(1) metal gate
Keyword(2) High-k
Keyword(3) Gate-Last process
Keyword(4) (110)-substrate
1st Author's Name S. Yamaguchi
1st Author's Affiliation Semiconductor Technology Development Group, Semiconductor Business Unit, SONY Corporation()
2nd Author's Name K. Tai
2nd Author's Affiliation Semiconductor Technology Development Group, Semiconductor Business Unit, SONY Corporation
3rd Author's Name T. Hirano
3rd Author's Affiliation Semiconductor Technology Development Group, Semiconductor Business Unit, SONY Corporation
4th Author's Name T. Ando
4th Author's Affiliation Semiconductor Technology Development Group, Semiconductor Business Unit, SONY Corporation
5th Author's Name S. Hiyama
5th Author's Affiliation Semiconductor Technology Development Group, Semiconductor Business Unit, SONY Corporation
6th Author's Name J. Wang
6th Author's Affiliation Semiconductor Technology Development Group, Semiconductor Business Unit, SONY Corporation
7th Author's Name Y. Hagimoto
7th Author's Affiliation Semiconductor Technology Development Group, Semiconductor Business Unit, SONY Corporation
8th Author's Name Y. Nagahama
8th Author's Affiliation Semiconductor Technology Development Group, Semiconductor Business Unit, SONY Corporation
9th Author's Name T. Kato
9th Author's Affiliation Semiconductor Technology Development Group, Semiconductor Business Unit, SONY Corporation
10th Author's Name K. Nagano
10th Author's Affiliation Semiconductor Technology Development Group, Semiconductor Business Unit, SONY Corporation
11th Author's Name M. Yamanaka
11th Author's Affiliation Semiconductor Technology Development Group, Semiconductor Business Unit, SONY Corporation
12th Author's Name S. Terauchi
12th Author's Affiliation Semiconductor Technology Development Group, Semiconductor Business Unit, SONY Corporation
13th Author's Name S. Kanda
13th Author's Affiliation Semiconductor Technology Development Group, Semiconductor Business Unit, SONY Corporation
14th Author's Name R. Yamamoto
14th Author's Affiliation Semiconductor Technology Development Group, Semiconductor Business Unit, SONY Corporation
15th Author's Name Y. Tateshita
15th Author's Affiliation Semiconductor Technology Development Group, Semiconductor Business Unit, SONY Corporation
16th Author's Name Y. Tagawa
16th Author's Affiliation Semiconductor Technology Development Group, Semiconductor Business Unit, SONY Corporation
17th Author's Name H. Iwamoto
17th Author's Affiliation Semiconductor Technology Development Group, Semiconductor Business Unit, SONY Corporation
18th Author's Name M. Saito
18th Author's Affiliation Semiconductor Technology Development Group, Semiconductor Business Unit, SONY Corporation
19th Author's Name N. Nagashima
19th Author's Affiliation Semiconductor Technology Development Group, Semiconductor Business Unit, SONY Corporation
20th Author's Name S. Kadomura
20th Author's Affiliation Semiconductor Technology Development Group, Semiconductor Business Unit, SONY Corporation
Date 2006-08-18
Paper # SDM2006-146,ICD2006-100
Volume (vol) vol.106
Number (no) 207
Page pp.pp.-
#Pages 6
Date of Issue