Presentation 2006-08-17
An Ultra-Wide Range Digitally Adaptive Control Phase Locked Loop with New 3-Phase Switched Capacitor Loop Filter
Shiro Dosho, Naoshi Yanagisawa, Kazuaki Sogawa, Yuji Yamada, Takashi Morie,
PDF Download Page PDF download Page Link
Abstract(in Japanese) (See Japanese page)
Abstract(in English) It is an innovative idea for modern PLL generation to control the bandwidth proportionally to a reference frequency. Recently, a frequency of the operating clock in microprocessors has been required to be changed frequently and widely in order to manage power consumption and throughput. A new switched capacitor(SC) filter which has fully flat response has been developed. We have also developed a new digital control method for realizing adaptive biased PLL with the widest frequency range. The measured performances of the test chip were good enough for the use in the microprocessors.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) Loop Filter / Switched Capacitor / Phase Locked Loop / Digital Control / Adaptive Control
Paper # SDM2006-141,ICD2006-95
Date of Issue

Conference Information
Committee SDM
Conference Date 2006/8/10(1days)
Place (in Japanese) (See Japanese page)
Place (in English)
Topics (in Japanese) (See Japanese page)
Topics (in English)
Chair
Vice Chair
Secretary
Assistant

Paper Information
Registration To Silicon Device and Materials (SDM)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) An Ultra-Wide Range Digitally Adaptive Control Phase Locked Loop with New 3-Phase Switched Capacitor Loop Filter
Sub Title (in English)
Keyword(1) Loop Filter
Keyword(2) Switched Capacitor
Keyword(3) Phase Locked Loop
Keyword(4) Digital Control
Keyword(5) Adaptive Control
1st Author's Name Shiro Dosho
1st Author's Affiliation Matsushita Electric Industrial Co. Ltd. Strategic Semiconductor Development Center()
2nd Author's Name Naoshi Yanagisawa
2nd Author's Affiliation Matsushita Electric Industrial Co. Ltd. Strategic Semiconductor Development Center
3rd Author's Name Kazuaki Sogawa
3rd Author's Affiliation Matsushita Electric Industrial Co. Ltd. Strategic Semiconductor Development Center
4th Author's Name Yuji Yamada
4th Author's Affiliation Matsushita Electric Industrial Co. Ltd. Strategic Semiconductor Development Center
5th Author's Name Takashi Morie
5th Author's Affiliation Matsushita Electric Industrial Co. Ltd. Strategic Semiconductor Development Center
Date 2006-08-17
Paper # SDM2006-141,ICD2006-95
Volume (vol) vol.106
Number (no) 206
Page pp.pp.-
#Pages 6
Date of Issue