| Presentation | 2006-09-26 Improvement of Drive Current in Bulk-FinFET using Full 3-D Process/Device Simulations Takahisa KANEMURA, Takashi IZUMIDA, Nobutoshi AOKI, Masaki KONDO, Sanae ITO, Toshiyuki ENDA, Kimitoshi OKANO, Hirohisa KAWASAKI, Atsushi YAGISHITA, Akio KANEKO, Satoshi INABA, Mitsutoshi NAKAMURA, Kazunari ISHIMARU, Kyoichi SUGURO, Kazuhiro EGUCHI, Hidemi ISHIUCHI, |
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| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | We discussed the optimization of structure of bulk-FinFETs and ion implantations by using 3-D process and device simulations. The ion implantation for channel region was determined so as to realize higher drive current with lower punch-through current. The analysis of mechanical stress for bulk-FinFETs and SOI-FinFETs revealed that the channel stress induced by a stress liner in the bulk-FinFET was larger than that for the SOI-FinFET. In addition, we applied a raised source/drain (RSD) structure to the bulk-FinFETs and optimized ion implantations in the RSD region. The combination of stress liner and RSD structure is found to be efficient for improving drive current of a bulk-FinFET. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | FinFET / drive current / punch-through current / raised source/drain / mobility enhancement / optimization / 3-D process simulation / 3-D device simulation / TCAD |
| Paper # | VLD2006-43,SDM2006-164 |
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| Conference Information | |
| Committee | VLD |
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| Conference Date | 2006/9/19(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
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| Chair | |
| Vice Chair | |
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| Paper Information | |
| Registration To | VLSI Design Technologies (VLD) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Improvement of Drive Current in Bulk-FinFET using Full 3-D Process/Device Simulations |
| Sub Title (in English) | |
| Keyword(1) | FinFET |
| Keyword(2) | drive current |
| Keyword(3) | punch-through current |
| Keyword(4) | raised source/drain |
| Keyword(5) | mobility enhancement |
| Keyword(6) | optimization |
| Keyword(7) | 3-D process simulation |
| Keyword(8) | 3-D device simulation |
| Keyword(9) | TCAD |
| 1st Author's Name | Takahisa KANEMURA |
| 1st Author's Affiliation | Center for Semiconductor Research and Development:Semiconductor Company, Toshiba Corporation() |
| 2nd Author's Name | Takashi IZUMIDA |
| 2nd Author's Affiliation | Center for Semiconductor Research and Development:Semiconductor Company, Toshiba Corporation |
| 3rd Author's Name | Nobutoshi AOKI |
| 3rd Author's Affiliation | Center for Semiconductor Research and Development:Semiconductor Company, Toshiba Corporation |
| 4th Author's Name | Masaki KONDO |
| 4th Author's Affiliation | Center for Semiconductor Research and Development:Semiconductor Company, Toshiba Corporation |
| 5th Author's Name | Sanae ITO |
| 5th Author's Affiliation | Center for Semiconductor Research and Development:Semiconductor Company, Toshiba Corporation |
| 6th Author's Name | Toshiyuki ENDA |
| 6th Author's Affiliation | Center for Semiconductor Research and Development:Semiconductor Company, Toshiba Corporation |
| 7th Author's Name | Kimitoshi OKANO |
| 7th Author's Affiliation | Center for Semiconductor Research and Development:Semiconductor Company, Toshiba Corporation |
| 8th Author's Name | Hirohisa KAWASAKI |
| 8th Author's Affiliation | Center for Semiconductor Research and Development:Semiconductor Company, Toshiba Corporation |
| 9th Author's Name | Atsushi YAGISHITA |
| 9th Author's Affiliation | Process & Manufacturing Engineering Center:Semiconductor Company, Toshiba Corporation |
| 10th Author's Name | Akio KANEKO |
| 10th Author's Affiliation | Process & Manufacturing Engineering Center:Semiconductor Company, Toshiba Corporation |
| 11th Author's Name | Satoshi INABA |
| 11th Author's Affiliation | Center for Semiconductor Research and Development:Semiconductor Company, Toshiba Corporation |
| 12th Author's Name | Mitsutoshi NAKAMURA |
| 12th Author's Affiliation | Center for Semiconductor Research and Development:Semiconductor Company, Toshiba Corporation |
| 13th Author's Name | Kazunari ISHIMARU |
| 13th Author's Affiliation | Center for Semiconductor Research and Development:Semiconductor Company, Toshiba Corporation |
| 14th Author's Name | Kyoichi SUGURO |
| 14th Author's Affiliation | Process & Manufacturing Engineering Center:Semiconductor Company, Toshiba Corporation |
| 15th Author's Name | Kazuhiro EGUCHI |
| 15th Author's Affiliation | Process & Manufacturing Engineering Center:Semiconductor Company, Toshiba Corporation |
| 16th Author's Name | Hidemi ISHIUCHI |
| 16th Author's Affiliation | Center for Semiconductor Research and Development:Semiconductor Company, Toshiba Corporation |
| Date | 2006-09-26 |
| Paper # | VLD2006-43,SDM2006-164 |
| Volume (vol) | vol.106 |
| Number (no) | 255 |
| Page | pp.pp.- |
| #Pages | 5 |
| Date of Issue | |