| Presentation | 2006-09-15 Numerical Function Generators Based on Polynomial Approximation Suitable for FPGA Implementation Shinobu NAGAYAMA, Tsutomu SASAO, Jon T. BUTLER, |
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| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | This paper presents an architecture and a synthesis method for numerical function generators (NFGs) based on a kth-order polynomial approximation of a numerical function that is (k+1)-times differentiate. By increasing the polynomial order k, we can reduce the memory size of NFGs for a wide range of functions. On the other hand, larger k requires more logic elements and multipliers. To generate the most efficient NFGs depending on the unused hardware resources in an FPGA, we introduce the FPGA utilization measure, and find an optimum polynomial order k. Experimental results show that: when all hardware resources in an FPGA can be used for a single NFG, 1) for low-precision (up to 17 bits), 1st-order polynomial approximation produces the most efficient implementation; and 2) for high-precision (18 to 24 bits), 2nd-order polynomial approximation produces the most efficient implementation. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | Non-uniform segmentation / LUT cascades / Chebyshev approximation polynomial / numerical function generators (NFGs) / FPGA utilization measure |
| Paper # | RECONF2006-29 |
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| Conference Information | |
| Committee | RECONF |
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| Conference Date | 2006/9/8(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
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| Paper Information | |
| Registration To | Reconfigurable Systems (RECONF) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Numerical Function Generators Based on Polynomial Approximation Suitable for FPGA Implementation |
| Sub Title (in English) | |
| Keyword(1) | Non-uniform segmentation |
| Keyword(2) | LUT cascades |
| Keyword(3) | Chebyshev approximation polynomial |
| Keyword(4) | numerical function generators (NFGs) |
| Keyword(5) | FPGA utilization measure |
| 1st Author's Name | Shinobu NAGAYAMA |
| 1st Author's Affiliation | Department of Computer Engineering, Hiroshima City University() |
| 2nd Author's Name | Tsutomu SASAO |
| 2nd Author's Affiliation | Department of Computer Science and Electronics, Kyushu Institute of Technology |
| 3rd Author's Name | Jon T. BUTLER |
| 3rd Author's Affiliation | Department of Electrical and Computer Engineering, Naval Postgraduate School |
| Date | 2006-09-15 |
| Paper # | RECONF2006-29 |
| Volume (vol) | vol.106 |
| Number (no) | 247 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |