Presentation 2006/6/26
A Proposal of Twin-Channel (TC)-MOSFET and its Fabrication Process(Session 8A Silicon Devices V)
Shun-ichiro OHMI, Tetsushi SAKAI,
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Abstract(in Japanese) (See Japanese page)
Abstract(in English) Twin-Channel (TC)-MOSFET with twin Ω-gate Si channels and its fabrication process were proposed. The twin Ω-gate structures were considered to be fabricated by self-aligned process utilizing wet etching of SiN. Three-dimensional (3D) device simulation was performed for devices with 10nm x 10nm (T_ x W_G) channels with the gate length of 30nm, and it was found that Ω-gate devices in case the L_ was 3nm showed excellent device characteristics similar to the gate-all-around devices (L_=5nm). Fabrication process of twin-channel formation was also investigated, and approximately 40nm x 40nm channels were successfully fabricated by the proposed fabrication process.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) Twin-Channel / Self-align / Q-Gate / SiN / Wet Etching
Paper # ED2006-101,SDM2006-109
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Committee SDM
Conference Date 2006/6/26(1days)
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Language ENG
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) A Proposal of Twin-Channel (TC)-MOSFET and its Fabrication Process(Session 8A Silicon Devices V)
Sub Title (in English)
Keyword(1) Twin-Channel
Keyword(2) Self-align
Keyword(3) Q-Gate
Keyword(4) SiN
Keyword(5) Wet Etching
1st Author's Name Shun-ichiro OHMI
1st Author's Affiliation Dept. of Electronics and Applied Physics, Interdisciplinary Graduate School of Science and Engineering, Tokyo Institute of Technology()
2nd Author's Name Tetsushi SAKAI
2nd Author's Affiliation Dept. of Electronics and Applied Physics, Interdisciplinary Graduate School of Science and Engineering, Tokyo Institute of Technology
Date 2006/6/26
Paper # ED2006-101,SDM2006-109
Volume (vol) vol.106
Number (no) 138
Page pp.pp.-
#Pages 6
Date of Issue