Presentation 2006/6/26
Characterization of Conductance Switching in Schottky-Wrap-Gate-Controlled Quantum Wire Transistors in A-Few-Electron Regime(Session 7B Compound Semiconductor Devices III)
Seiya KASAI, Yuta SHIRATORI, Tatsuya NAKAMURA, Takahiro TAMURA,
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Abstract(in Japanese) (See Japanese page)
Abstract(in English) Binary conductance switching at the first quantized conductance step in Schottky-wrap-gate (WPG)-controlled quantum wire transistors was characterized for the low power operation of the hexagonal binary-decision diagram (BDD) logic quantum circuits. The fabricated devices showed clear conductance quantization and their trace survived up to 80 K. They also exhibited non-linear dependence of logic swing and conductance step height on temperature, which were not explained by the standard one-dimensional transport theory. Analysis on the observed behaviors indicated the appearance of charge-spin separation under a low-electron-density condition in the quantum wire. This also suggests the possibility of 0.5G_0 switching, corresponding to single electron switching, even in quantum wire transistors.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) Quantum wire / Quantized conductance / Binary switching / Low power dissipation / Schottky wrap gate (WPG)
Paper # ED2006-98,SDM2006-106
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Conference Information
Committee SDM
Conference Date 2006/6/26(1days)
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Registration To Silicon Device and Materials (SDM)
Language ENG
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Characterization of Conductance Switching in Schottky-Wrap-Gate-Controlled Quantum Wire Transistors in A-Few-Electron Regime(Session 7B Compound Semiconductor Devices III)
Sub Title (in English)
Keyword(1) Quantum wire
Keyword(2) Quantized conductance
Keyword(3) Binary switching
Keyword(4) Low power dissipation
Keyword(5) Schottky wrap gate (WPG)
1st Author's Name Seiya KASAI
1st Author's Affiliation Graduate School of Information Science and Technology, Hokkaido University:Research Center for Integrated Quantum Electronics, Hokkaido University()
2nd Author's Name Yuta SHIRATORI
2nd Author's Affiliation Graduate School of Information Science and Technology, Hokkaido University:Research Center for Integrated Quantum Electronics, Hokkaido University
3rd Author's Name Tatsuya NAKAMURA
3rd Author's Affiliation Graduate School of Information Science and Technology, Hokkaido University:Research Center for Integrated Quantum Electronics, Hokkaido University
4th Author's Name Takahiro TAMURA
4th Author's Affiliation Graduate School of Information Science and Technology, Hokkaido University:Research Center for Integrated Quantum Electronics, Hokkaido University
Date 2006/6/26
Paper # ED2006-98,SDM2006-106
Volume (vol) vol.106
Number (no) 138
Page pp.pp.-
#Pages 5
Date of Issue