| Presentation | 2006/6/26 GaN-based Vertical Field Effect Transistors with High Current Density Fabricated Using Self-Aligned Process(Session 7B Compound Semiconductor Devices III) Tatsuo MORITA, Satoshi NAKAZAWA, Tetsuzo UEDA, Tsuyoshi TANAKA, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | We present a GaN-based vertical transistor with very high current density at the submicron channel. An InAlGaN quaternary alloy on the small post serves non-alloy ohmic contact with WSi electrode. A PdSi gate electrode is formed in a self-aligned manner using the overhang of WSi ohmic electrode as a mask, resulting in good pinch-off characteristics. The fabricated vertical transistor exhibits very high current density of 80kA/cm^2 together with current-collapse-free operation by the reduction of the exposed surface area. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | GaN / InAlGaN / vertical / field effect transistor / self-aligned / current collapse |
| Paper # | ED2006-94,SDM2006-102 |
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| Conference Information | |
| Committee | SDM |
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| Conference Date | 2006/6/26(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
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| Vice Chair | |
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| Paper Information | |
| Registration To | Silicon Device and Materials (SDM) |
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| Language | ENG |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | GaN-based Vertical Field Effect Transistors with High Current Density Fabricated Using Self-Aligned Process(Session 7B Compound Semiconductor Devices III) |
| Sub Title (in English) | |
| Keyword(1) | GaN |
| Keyword(2) | InAlGaN |
| Keyword(3) | vertical |
| Keyword(4) | field effect transistor |
| Keyword(5) | self-aligned |
| Keyword(6) | current collapse |
| 1st Author's Name | Tatsuo MORITA |
| 1st Author's Affiliation | Semiconductor Device Research Center, Matsushita Electric Industrial Co., Ltd.() |
| 2nd Author's Name | Satoshi NAKAZAWA |
| 2nd Author's Affiliation | Semiconductor Device Research Center, Matsushita Electric Industrial Co., Ltd. |
| 3rd Author's Name | Tetsuzo UEDA |
| 3rd Author's Affiliation | Semiconductor Device Research Center, Matsushita Electric Industrial Co., Ltd. |
| 4th Author's Name | Tsuyoshi TANAKA |
| 4th Author's Affiliation | Semiconductor Device Research Center, Matsushita Electric Industrial Co., Ltd. |
| Date | 2006/6/26 |
| Paper # | ED2006-94,SDM2006-102 |
| Volume (vol) | vol.106 |
| Number (no) | 138 |
| Page | pp.pp.- |
| #Pages | 4 |
| Date of Issue | |