| Presentation | 2006/6/26 SOI-Based Nanoscale CMOS Device Technology(Session 6A Silicon Devices III,AWAD2006) Chang-Geun Ahn, Kiju Im, Jong-Heon Yang, In-Bok Baek, Won-Ju Cho, Seong-jae Lee, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | Two kinds of novel device structures were suggested to achieve continued scaling of MOSFET gate lengths to the sub-100nm regime. Frist, an ultra-thin body SOI MOSFET with a recessed source-drain (S/D) structure is proposed to reduce the S/D extension (SDE) resistance. A recessed buried oxide under the SDE regions is completely filled with the heavily doped polysilicon, which can lead to a low SDE resistance. A recessed S/D SOI MOSFET with 30nm gate length and 5nm thick undoped channel, was successfully fabricated and showed the good SCE immunities. Second, we have also fabricated a ISG UTB MOSFET with a polysilicon raised S/D, HfO_2 gate dielectric, and Pt metal gate electrode, which is considered as the promising candidate for the sub-100nm devices. Even the short channel device with 40nm gate length, short channel effects were slightly observed after the high pressure anneal. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | SOI / recessed source-drain / high-k gate dielectric / metal gate electrode / inner sidewall gate |
| Paper # | ED2006-82,SDM2006-90 |
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| Conference Information | |
| Committee | SDM |
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| Conference Date | 2006/6/26(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
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| Chair | |
| Vice Chair | |
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| Paper Information | |
| Registration To | Silicon Device and Materials (SDM) |
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| Language | ENG |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | SOI-Based Nanoscale CMOS Device Technology(Session 6A Silicon Devices III,AWAD2006) |
| Sub Title (in English) | |
| Keyword(1) | SOI |
| Keyword(2) | recessed source-drain |
| Keyword(3) | high-k gate dielectric |
| Keyword(4) | metal gate electrode |
| Keyword(5) | inner sidewall gate |
| 1st Author's Name | Chang-Geun Ahn |
| 1st Author's Affiliation | Nano Bio-electric Devices Team, IT Convergence & Components Laboratory() |
| 2nd Author's Name | Kiju Im |
| 2nd Author's Affiliation | Nano Bio-electric Devices Team, IT Convergence & Components Laboratory |
| 3rd Author's Name | Jong-Heon Yang |
| 3rd Author's Affiliation | Nano Bio-electric Devices Team, IT Convergence & Components Laboratory |
| 4th Author's Name | In-Bok Baek |
| 4th Author's Affiliation | Nano Bio-electric Devices Team, IT Convergence & Components Laboratory |
| 5th Author's Name | Won-Ju Cho |
| 5th Author's Affiliation | Department of Electronic Materials Engineering, Kwangwoon University |
| 6th Author's Name | Seong-jae Lee |
| 6th Author's Affiliation | Nano Bio-electric Devices Team, IT Convergence & Components Laboratory |
| Date | 2006/6/26 |
| Paper # | ED2006-82,SDM2006-90 |
| Volume (vol) | vol.106 |
| Number (no) | 138 |
| Page | pp.pp.- |
| #Pages | 4 |
| Date of Issue | |