| Presentation | 2006/6/26 Retention Time Analysis on DRAM Cell Transistor from Planar to Nonplanar Gate Structures(Session 4 Silicon Devices II,AWAD2006) Jae Hoon CHOI, Sang Yong KIM, Sang Dong YOO, Seon Yong CHA, Moon Sik SEO, Eun Mi KWON, Myung Hee KANG, Sung Kye PARK, Sung Joo HONG, |
|---|---|
| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | We examined the characteristics of the DRAM cell transistor's retention time by extracting the electric field peak values and their positions using a new simulation method with traps. In order to enhance the retention time, it is essential to reduce the electric field at the storage node junction, which should be performed by decrease the channel doping level without any change in the threshold voltage. We compared the planar gate structure with the non-planar, and the symmetric doping profiles with the asymmetric ones. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | Retention Time / DRAM Cell Transistor / Electric Field / Leakage Current / Trap |
| Paper # | ED2006-73,SDM2006-81 |
| Date of Issue |
| Conference Information | |
| Committee | SDM |
|---|---|
| Conference Date | 2006/6/26(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Chair | |
| Vice Chair | |
| Secretary | |
| Assistant | |
| Paper Information | |
| Registration To | Silicon Device and Materials (SDM) |
|---|---|
| Language | ENG |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Retention Time Analysis on DRAM Cell Transistor from Planar to Nonplanar Gate Structures(Session 4 Silicon Devices II,AWAD2006) |
| Sub Title (in English) | |
| Keyword(1) | Retention Time |
| Keyword(2) | DRAM Cell Transistor |
| Keyword(3) | Electric Field |
| Keyword(4) | Leakage Current |
| Keyword(5) | Trap |
| 1st Author's Name | Jae Hoon CHOI |
| 1st Author's Affiliation | R&D Division, Hynix Semiconductor Inc.() |
| 2nd Author's Name | Sang Yong KIM |
| 2nd Author's Affiliation | R&D Division, Hynix Semiconductor Inc. |
| 3rd Author's Name | Sang Dong YOO |
| 3rd Author's Affiliation | R&D Division, Hynix Semiconductor Inc. |
| 4th Author's Name | Seon Yong CHA |
| 4th Author's Affiliation | R&D Division, Hynix Semiconductor Inc. |
| 5th Author's Name | Moon Sik SEO |
| 5th Author's Affiliation | R&D Division, Hynix Semiconductor Inc. |
| 6th Author's Name | Eun Mi KWON |
| 6th Author's Affiliation | R&D Division, Hynix Semiconductor Inc. |
| 7th Author's Name | Myung Hee KANG |
| 7th Author's Affiliation | R&D Division, Hynix Semiconductor Inc. |
| 8th Author's Name | Sung Kye PARK |
| 8th Author's Affiliation | R&D Division, Hynix Semiconductor Inc. |
| 9th Author's Name | Sung Joo HONG |
| 9th Author's Affiliation | R&D Division, Hynix Semiconductor Inc. |
| Date | 2006/6/26 |
| Paper # | ED2006-73,SDM2006-81 |
| Volume (vol) | vol.106 |
| Number (no) | 138 |
| Page | pp.pp.- |
| #Pages | 4 |
| Date of Issue | |