Presentation 2006-06-22
Re-placement Method for Circuit Modification
Kunihiko YANAGIBASHI, Yasuhiro TAKASHIMA,
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Abstract(in English) This paper proposes a re-placement method for circuit modification. The re-placement is required to realize a placement with small area in a short time, while the similarity to the previous placement is kept. For the objective, the proposed algorithm employs to minimize the sum of differences of the length of each wire from the one in the previous placement. We propose a non full-reverse-order constraint, which is obtained by relaxing the topological relation in the previous placement. The constraint leads the resultant placement similar to the previous one in terms of the topology. The optimization method for re-placement is simulated annealing. Since the modification of re-placement is local, we limit the modification range around the added module. As a result, an efficient and high-speed re-placement is achieved. Experimental results demonstrate that the proposed algorithm is effective and efficient.
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Keyword(in English) Non full-reverse-order constraint / Circuit Modification / Re-placement / Sequence-Pair / Simulated Annealing
Paper # CAS2006-7,VLD2006-20,SIP2006-30
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Committee CAS
Conference Date 2006/6/15(1days)
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Registration To Circuits and Systems (CAS)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Re-placement Method for Circuit Modification
Sub Title (in English)
Keyword(1) Non full-reverse-order constraint
Keyword(2) Circuit Modification
Keyword(3) Re-placement
Keyword(4) Sequence-Pair
Keyword(5) Simulated Annealing
1st Author's Name Kunihiko YANAGIBASHI
1st Author's Affiliation Department of Information and Media Sciences Faculty of Environmental Engineering, The University of Kitakyushu()
2nd Author's Name Yasuhiro TAKASHIMA
2nd Author's Affiliation Department of Information and Media Sciences Faculty of Environmental Engineering, The University of Kitakyushu
Date 2006-06-22
Paper # CAS2006-7,VLD2006-20,SIP2006-30
Volume (vol) vol.106
Number (no) 111
Page pp.pp.-
#Pages 6
Date of Issue