Presentation 2006-06-22
Modeling of Layout Dependent Copper Electrochemical Plating
Daisuke FUKUDA, Hidetoshi MATSUOKA, Toshiyuki SHIBUYA,
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Abstract(in English) In VLSI (Very Large Scale Integrated Circuit) fabrication using copper(Cu) process, electrochemical plating (ECP) and chemical mechanical planarization (CMP) are techniques to make copper interconnect pattern. From the point of view of DFM, it is necessary to estimate Cu and Oxide thickness variation more accurately. In this paper, we make clear the reason of inaccuracy of old model and propose the enhanced model of ECP estimation depending on layout pattern.
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Keyword(in English) ECP / CMP / DFM
Paper # CAS2006-2,VLD2006-15,SIP2006-25
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Conference Information
Committee VLD
Conference Date 2006/6/15(1days)
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Registration To VLSI Design Technologies (VLD)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Modeling of Layout Dependent Copper Electrochemical Plating
Sub Title (in English)
Keyword(1) ECP
Keyword(2) CMP
Keyword(3) DFM
1st Author's Name Daisuke FUKUDA
1st Author's Affiliation FUJITSU LABORATORIES LTD.()
2nd Author's Name Hidetoshi MATSUOKA
2nd Author's Affiliation FUJITSU LABORATORIES LTD.
3rd Author's Name Toshiyuki SHIBUYA
3rd Author's Affiliation FUJITSU LABORATORIES LTD.
Date 2006-06-22
Paper # CAS2006-2,VLD2006-15,SIP2006-25
Volume (vol) vol.106
Number (no) 113
Page pp.pp.-
#Pages 6
Date of Issue