Presentation 2006-06-09
Processor Architecture for Road Extraction Based on Projective Transformation
Sunggae LEE, Masanori HARIYAMA, Michitaka KAMEYAMA,
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Abstract(in English) This paper presents a processor architecture for a robust road-extraction algorithm using stereo images. The road-extraction method estimates a projective-transformation matrix H that represents the geometrical features of road regions. The road region can be robustly extracted using Sum of Absolute Differences (SAD) between one image and a transformed image of the other one. To accelerate the projective transformation, dedicated multipliers are employed. A dynamically reconfigurable architecture for robust estimation and SAD-based extraction is presented. For image size 720×480, the execution time on the proposed processor is 0.05 seconds whereas that on a microprocessor is 2.5 seconds.
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Keyword(in English) projective transformation / homography / dynamically reconfigurable processor
Paper # ICD2006-51
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Committee ICD
Conference Date 2006/6/1(1days)
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Registration To Integrated Circuits and Devices (ICD)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Processor Architecture for Road Extraction Based on Projective Transformation
Sub Title (in English)
Keyword(1) projective transformation
Keyword(2) homography
Keyword(3) dynamically reconfigurable processor
1st Author's Name Sunggae LEE
1st Author's Affiliation Graduate School of Information Sciences, Tohoku University()
2nd Author's Name Masanori HARIYAMA
2nd Author's Affiliation Graduate School of Information Sciences, Tohoku University
3rd Author's Name Michitaka KAMEYAMA
3rd Author's Affiliation Graduate School of Information Sciences, Tohoku University
Date 2006-06-09
Paper # ICD2006-51
Volume (vol) vol.106
Number (no) 92
Page pp.pp.-
#Pages 5
Date of Issue