Presentation 2006-06-08
Dynamic Control Mechanisms for Pipeline Stage Unification Based on Program Phase Detection
Jun YAO, Hajime SHIMADA, Yasuhiko NAKASHIMA, Shin-ichiro MORI, Shinji TOMITA,
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Abstract(in English) A method called pipeline stage unification (PSU) has been proposed to reduce power consumption for modern processors, which can work as an alternative for Dynamic Voltage Scaling (DVS) technology. In this paper, we proposed two mechanisms for PSU controller which can dynamically predicate a suitable unification based on the program phase detection. Our results show that the two mechanisms can achieve an average Energy Delay Product (EDP) decreasing of 15.1% and 19.2% for SPECint2000 benchmarks, compared to the processor without PSU.
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Keyword(in English) Power Consumption / Program Phase Detection / Dynamic / Pipeline Stage Unification (PSU)
Paper # ICD2006-43
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Conference Date 2006/6/1(1days)
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Registration To Integrated Circuits and Devices (ICD)
Language ENG
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Dynamic Control Mechanisms for Pipeline Stage Unification Based on Program Phase Detection
Sub Title (in English)
Keyword(1) Power Consumption
Keyword(2) Program Phase Detection
Keyword(3) Dynamic
Keyword(4) Pipeline Stage Unification (PSU)
1st Author's Name Jun YAO
1st Author's Affiliation Graduate School of Informatics, Kyoto Univ.()
2nd Author's Name Hajime SHIMADA
2nd Author's Affiliation Graduate School of Informatics, Kyoto Univ.
3rd Author's Name Yasuhiko NAKASHIMA
3rd Author's Affiliation Graduate School of Information Science, NAIST
4th Author's Name Shin-ichiro MORI
4th Author's Affiliation Graduate School of Engineering, Fukui Univ.
5th Author's Name Shinji TOMITA
5th Author's Affiliation Graduate School of Informatics, Kyoto Univ.
Date 2006-06-08
Paper # ICD2006-43
Volume (vol) vol.106
Number (no) 92
Page pp.pp.-
#Pages 6
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