| Presentation | 2006-05-19 A Verification and Evaluation Environment for Broadband Wireless Communication System with CI-OFDM Yosuke Yamahara, Yuki Matsumoto, Toshihiro Masaki, Tomonori Izumi, Minoru Okada, Kenji Fujita, Kenji Matsumura, |
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| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | This paper presents a design of a verification and evaluation system based on FPGAs for CI-OFDM (Carrier Interferometry Orthogonal Frequency Division Multiplexing) high-speed wireless communication systems. Our FPGA-based prototype enables real-time execution of the high-speed CI-OFDM communications with analog and other parts, and thus, enables short turn-around-time in the collaboration of our reference software and prototype hardware for improving, fixing, and fitting algorithms and architectures. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | FPGA / CI-OFDM / Prototyping / Verification / Embedded Logic Analyzer |
| Paper # | RECONF2006-19 |
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| Conference Information | |
| Committee | RECONF |
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| Conference Date | 2006/5/12(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
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| Paper Information | |
| Registration To | Reconfigurable Systems (RECONF) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | A Verification and Evaluation Environment for Broadband Wireless Communication System with CI-OFDM |
| Sub Title (in English) | |
| Keyword(1) | FPGA |
| Keyword(2) | CI-OFDM |
| Keyword(3) | Prototyping |
| Keyword(4) | Verification |
| Keyword(5) | Embedded Logic Analyzer |
| 1st Author's Name | Yosuke Yamahara |
| 1st Author's Affiliation | Graduate School of Science and Engineering, Ritsumeikan University:Synthesis Corporation() |
| 2nd Author's Name | Yuki Matsumoto |
| 2nd Author's Affiliation | Graduate School of Science and Engineering, Ritsumeikan University:Synthesis Corporation |
| 3rd Author's Name | Toshihiro Masaki |
| 3rd Author's Affiliation | Center for Advanced Science and Innovation, Osaka University:Synthesis Corporation |
| 4th Author's Name | Tomonori Izumi |
| 4th Author's Affiliation | Graduate School of Science and Engineering, Ritsumeikan University:Department of VLSI System Design, Ritsumeikan University:Synthesis Corporation |
| 5th Author's Name | Minoru Okada |
| 5th Author's Affiliation | Graduate School of Information Science, Nara Institute of Science and Technology:Synthesis Corporation |
| 6th Author's Name | Kenji Fujita |
| 6th Author's Affiliation | KCS Co.Ltd. |
| 7th Author's Name | Kenji Matsumura |
| 7th Author's Affiliation | KCS Co.Ltd. |
| Date | 2006-05-19 |
| Paper # | RECONF2006-19 |
| Volume (vol) | vol.106 |
| Number (no) | 50 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |