| Presentation | 2006-05-19 An FPGA Implementation of Digital Synchronizer for High-Speed Wireless Communication System with CI-OFDM Takayuki Nakatani, Shoichiro Namba, Masahiro Funatsuki, Tomonori Izumi, Minoru Okada, Toshihiro Masaki, |
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| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | This paper presents a design and an FPGA implementation of digital synchronizer for a high-speed CI-OFDM (Carrier Interferometry Orthogonal Frequency Division Multiplexing) wireless communication system. In order to achieve the bandwidth of 200Mbps, we adopt pipelined architecture from the every point of view. Furthermore, each module is designed in data-driven style and works autonomously for changes in the evaluation and comparation process of algorithms. We resolve the difficulties in the design of the timing and feedback controls of such modules and succeed to achieve the performance. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | FPGA / CI-OFDM / Wireless Communications / Prototyping / Synchronization / Architecture |
| Paper # | RECONF2006-18 |
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| Conference Information | |
| Committee | RECONF |
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| Conference Date | 2006/5/12(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
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| Registration To | Reconfigurable Systems (RECONF) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | An FPGA Implementation of Digital Synchronizer for High-Speed Wireless Communication System with CI-OFDM |
| Sub Title (in English) | |
| Keyword(1) | FPGA |
| Keyword(2) | CI-OFDM |
| Keyword(3) | Wireless Communications |
| Keyword(4) | Prototyping |
| Keyword(5) | Synchronization |
| Keyword(6) | Architecture |
| 1st Author's Name | Takayuki Nakatani |
| 1st Author's Affiliation | Graduate School of Science and Engineering, Ritsumeikan University:Synthesis Corporation() |
| 2nd Author's Name | Shoichiro Namba |
| 2nd Author's Affiliation | Graduate School of Science and Engineering, Ritsumeikan University:Synthesis Corporation |
| 3rd Author's Name | Masahiro Funatsuki |
| 3rd Author's Affiliation | Graduate School of Science and Engineering, Ritsumeikan University:Synthesis Corporation |
| 4th Author's Name | Tomonori Izumi |
| 4th Author's Affiliation | Graduate School of Science and Engineering, Ritsumeikan University:Department of VLSI System Design, Ritsumeikan University:Synthesis Corporation |
| 5th Author's Name | Minoru Okada |
| 5th Author's Affiliation | Graduate School of Information Science, Nara Institute of Science and Technology:Synthesis Corporation |
| 6th Author's Name | Toshihiro Masaki |
| 6th Author's Affiliation | Center for Advanced Science and Innovation, Osaka University:Synthesis Corporation |
| Date | 2006-05-19 |
| Paper # | RECONF2006-18 |
| Volume (vol) | vol.106 |
| Number (no) | 50 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |