Presentation 2006-05-19
Wafer Scale Integration and Reconfigurable Systems
Susumu Horiguchi,
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Abstract(in English) It has been continued to implement much more circuits on a chip and high functional system in a silicon wafer since the commercialization of integrated circuits from the late 1970s. During 1980s to 1990s, it was reported that Wafer scale integration (WSI) had several attractive advantages; high speed, lower power consumption, fewer chip-to-chip bottlenecked, smaller size, higher reliability and lower system cost. Thus many WSI systems such as 3D-Computer, large scale multi-processor systems, high functional image processing systems and MEMs interated devices were implemented in research as well as in commercial products. This paper summarizes research trend of WSI devices during 1980s to 1990s and discuss the new era of reconfigurable computing.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) WSI / Reconfigurable / Redundancy Architecture / Fault and Defect Tolerances / WSI system / Reconfigurable Computing
Paper # RECONF2006-15
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Conference Information
Committee RECONF
Conference Date 2006/5/12(1days)
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Paper Information
Registration To Reconfigurable Systems (RECONF)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Wafer Scale Integration and Reconfigurable Systems
Sub Title (in English)
Keyword(1) WSI
Keyword(2) Reconfigurable
Keyword(3) Redundancy Architecture
Keyword(4) Fault and Defect Tolerances
Keyword(5) WSI system
Keyword(6) Reconfigurable Computing
1st Author's Name Susumu Horiguchi
1st Author's Affiliation Graduate School of Information Sciences Tohoku University()
Date 2006-05-19
Paper # RECONF2006-15
Volume (vol) vol.106
Number (no) 50
Page pp.pp.-
#Pages 6
Date of Issue