Presentation | 2006-05-19 Speed enhancement of FPGAs by reconfigration utilizing variations within a chip Kosuke Ogata, Manabu Kotani, Kazuya Katsuki, Kazuyoshi Kobayashi, Hidetoshi Onodera, |
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Abstract(in Japanese) | (See Japanese page) |
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Paper # | RECONF2006-14 |
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Committee | RECONF |
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Conference Date | 2006/5/12(1days) |
Place (in Japanese) | (See Japanese page) |
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Registration To | Reconfigurable Systems (RECONF) |
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Language | JPN |
Title (in Japanese) | (See Japanese page) |
Sub Title (in Japanese) | (See Japanese page) |
Title (in English) | Speed enhancement of FPGAs by reconfigration utilizing variations within a chip |
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1st Author's Name | Kosuke Ogata |
1st Author's Affiliation | Graduate school of Informatics, Kyoto University() |
2nd Author's Name | Manabu Kotani |
2nd Author's Affiliation | Graduate school of Informatics, Kyoto University |
3rd Author's Name | Kazuya Katsuki |
3rd Author's Affiliation | Graduate school of Informatics, Kyoto University |
4th Author's Name | Kazuyoshi Kobayashi |
4th Author's Affiliation | Graduate school of Informatics, Kyoto University |
5th Author's Name | Hidetoshi Onodera |
5th Author's Affiliation | Graduate school of Informatics, Kyoto University |
Date | 2006-05-19 |
Paper # | RECONF2006-14 |
Volume (vol) | vol.106 |
Number (no) | 50 |
Page | pp.pp.- |
#Pages | 6 |
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