| Presentation | 2006-05-18 Low Power Design Technique on Dynamic Reconfigurable Processor Takashi NISHIMURA, Yohei HASEGAWA, Hideharu AMANO, |
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| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | Dynamically Reconfigurable Processor (DRP) developed by NEC Electronics is a coarse grain reconfigurable processor that selects a data path from the on-chip repository of sixteen circuit configurations, or contexts at run-time. We discuss the relations of context switch and power consumption on dynamic reconfigurable processor. In multi-context type, while context switch consume additional power, time-multiplexd execution can hold down a toggle rate of data path and reduce power. In this study, we classified power consumption with a context switch in some categories, and analyze the tendency. Actually we have implemented several benchmark applications on DRP-1 with changing a method of mapping. As the result, it shows a power decrease of about 24% on the benchmark application which includes a lot of repetition processing and low implementation density. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | Dynamically Reconfigurable Processor / DRP / Context switch / Power consumption |
| Paper # | RECONF2006-7 |
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| Conference Information | |
| Committee | RECONF |
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| Conference Date | 2006/5/11(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
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| Paper Information | |
| Registration To | Reconfigurable Systems (RECONF) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Low Power Design Technique on Dynamic Reconfigurable Processor |
| Sub Title (in English) | |
| Keyword(1) | Dynamically Reconfigurable Processor |
| Keyword(2) | DRP |
| Keyword(3) | Context switch |
| Keyword(4) | Power consumption |
| 1st Author's Name | Takashi NISHIMURA |
| 1st Author's Affiliation | Department of Information and Computer Science, Keio University() |
| 2nd Author's Name | Yohei HASEGAWA |
| 2nd Author's Affiliation | Department of Information and Computer Science, Keio University |
| 3rd Author's Name | Hideharu AMANO |
| 3rd Author's Affiliation | Department of Information and Computer Science, Keio University |
| Date | 2006-05-18 |
| Paper # | RECONF2006-7 |
| Volume (vol) | vol.106 |
| Number (no) | 49 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |