Presentation 2006-03-02
Implementation and Evaluation of On-chip Storage for Wireless Sensor Networks
Makoto SUZUKI, Shunsuke SARUWATARI, Hiroyuki MORIKAWA, Tomonori AOYAMA,
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Abstract(in English) Wireless sensor networks allow to measure real-space information in unprecedented fine granularity. In wireless sensor networks, sensor nodes with low power-consumption are required in order to reduce the cost of battery replacement. Therefore, many researches of wireless sensor networks aim at reducing the power-consumption. In these researches, storage on each sensor node plays an important role. Focusing on the fact that program memory in the CPU is rewritable by CPU instructions, we propose an on-chip storage which use program memory as a storage area. On-chip storage enables each sensor node to use program memory as dozens of KB storage area, and to read/write faster with low power-consumption compared to external storages.
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Keyword(in English) Wireless sensor networks / On-chip storage
Paper # IN2005-163
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Committee IN
Conference Date 2006/2/23(1days)
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Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Implementation and Evaluation of On-chip Storage for Wireless Sensor Networks
Sub Title (in English)
Keyword(1) Wireless sensor networks
Keyword(2) On-chip storage
1st Author's Name Makoto SUZUKI
1st Author's Affiliation Graduate School of Frontier Sciences, The University of Tokyo()
2nd Author's Name Shunsuke SARUWATARI
2nd Author's Affiliation Graduate School of Frontier Sciences, The University of Tokyo
3rd Author's Name Hiroyuki MORIKAWA
3rd Author's Affiliation Graduate School of Frontier Sciences, The University of Tokyo
4th Author's Name Tomonori AOYAMA
4th Author's Affiliation Graduate School of Information Science and Technology, The University of Tokyo
Date 2006-03-02
Paper # IN2005-163
Volume (vol) vol.105
Number (no) 628
Page pp.pp.-
#Pages 6
Date of Issue