Presentation 2006/3/7
Development of high-density MRAM technologies : Expanding writing margin realized by a novel MTJ shape and a precisely controlled MTJ etching
Masatoshi YOSHIKAWA, Hiroaki YODA, Tadashi KAI, Yoshiaki ASAO, Sumio IKEGAWA, Kenji TSUCHIDA, Hiromitsu HADA, Shuichi TAHARA,
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Abstract(in Japanese) (See Japanese page)
Abstract(in English) Excellent bit yields of more than 99.9998% were successfully obtained for 1M-MTJ MRAM (1Mega-Magnetoresistive Tunneling Junction Magnetoresistive Random Access Memory), which was integrated on 0.13μm CMOS circuits. Expanding of writing margin and reduction of switching field distribution were realized by a novel MTJ shape and a precisely controlled MTJ etching technique. Additionally, a yoke wire reducing a writing current by 40% and a self-aligned MTJ fabrication process for shrinkage of a cell size to 8F^2 were developed.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) MRAM / MTJ / MTJ shape / Yoke wire / MTJ etching / Stray field / Switching field distribution
Paper # SDM2005-264
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Committee SDM
Conference Date 2006/3/7(1days)
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Paper Information
Registration To Silicon Device and Materials (SDM)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Development of high-density MRAM technologies : Expanding writing margin realized by a novel MTJ shape and a precisely controlled MTJ etching
Sub Title (in English)
Keyword(1) MRAM
Keyword(2) MTJ
Keyword(3) MTJ shape
Keyword(4) Yoke wire
Keyword(5) MTJ etching
Keyword(6) Stray field
Keyword(7) Switching field distribution
1st Author's Name Masatoshi YOSHIKAWA
1st Author's Affiliation Corporate Research and Development Center, Toshiba Corporation()
2nd Author's Name Hiroaki YODA
2nd Author's Affiliation Corporate Research and Development Center, Toshiba Corporation
3rd Author's Name Tadashi KAI
3rd Author's Affiliation Corporate Research and Development Center, Toshiba Corporation
4th Author's Name Yoshiaki ASAO
4th Author's Affiliation Corporate Research and Development Center, Toshiba Corporation
5th Author's Name Sumio IKEGAWA
5th Author's Affiliation Corporate Research and Development Center, Toshiba Corporation
6th Author's Name Kenji TSUCHIDA
6th Author's Affiliation Corporate Research and Development Center, Toshiba Corporation
7th Author's Name Hiromitsu HADA
7th Author's Affiliation System Devices Research Laboratories, NEC Corporation
8th Author's Name Shuichi TAHARA
8th Author's Affiliation System Devices Research Laboratories, NEC Corporation
Date 2006/3/7
Paper # SDM2005-264
Volume (vol) vol.105
Number (no) 654
Page pp.pp.-
#Pages 6
Date of Issue