Presentation 2006/3/7
Reversible Resistive Switching in the Ferroelectrics
Yoshito JIN, Hideaki SAKAI, Hiroyuki SHINOJIMA, Masaru SHIMADA, Youichi ENOMOTO, Mikiho KIUCHI,
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Abstract(in Japanese) (See Japanese page)
Abstract(in English) We have found that reversible resistive switching occurs at room temperature in a Bi_4Ti_3O_<12> thin film deposited by electron cyclotron resonance sputtering. The resistive switching was observed in several stacked capacitor structures regardless of the combination of top and bottom electrodes. The large magnitude of the resistance ratio in low-resistance and high-resistance states, reversible switching with voltage pulses, and long-term retention characteristics are described. Resistance in the low-resistance state hardly depended on neither the area of the electrode pad nor the thickness of bismuth titanate films. We also investigated that the correlation between resistive switching and ferroelectricity.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) reversible resistive switching / high-resistance state / low-resistance state / bismuth titanate / electron cyclotron resonance sputter deposition / stack capacitance structure
Paper # SDM2005-262
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Conference Information
Committee SDM
Conference Date 2006/3/7(1days)
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Paper Information
Registration To Silicon Device and Materials (SDM)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Reversible Resistive Switching in the Ferroelectrics
Sub Title (in English)
Keyword(1) reversible resistive switching
Keyword(2) high-resistance state
Keyword(3) low-resistance state
Keyword(4) bismuth titanate
Keyword(5) electron cyclotron resonance sputter deposition
Keyword(6) stack capacitance structure
1st Author's Name Yoshito JIN
1st Author's Affiliation Microsisystem Integration Laboratories, Nippon Telegrph and Telephone Corporation()
2nd Author's Name Hideaki SAKAI
2nd Author's Affiliation Microsisystem Integration Laboratories, Nippon Telegrph and Telephone Corporation
3rd Author's Name Hiroyuki SHINOJIMA
3rd Author's Affiliation Microsisystem Integration Laboratories, Nippon Telegrph and Telephone Corporation
4th Author's Name Masaru SHIMADA
4th Author's Affiliation Microsisystem Integration Laboratories, Nippon Telegrph and Telephone Corporation
5th Author's Name Youichi ENOMOTO
5th Author's Affiliation NTT Advanced Technology Corporation
6th Author's Name Mikiho KIUCHI
6th Author's Affiliation NTT AFTY Corporation
Date 2006/3/7
Paper # SDM2005-262
Volume (vol) vol.105
Number (no) 654
Page pp.pp.-
#Pages 6
Date of Issue