| Presentation | 2006/3/10 Protection Systems for Programmable Logic Device against Circuit Malfunctions Hiroyuki YOKOYAMA, Yohei HORI, Kenji TODA, |
|---|---|
| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | We propose a new architecture of circuit protection systems that prevent electrical circuits to be physically broken due to malfunctions originated from the reconfiguration data installed in a programmable logic device. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | FPGA / Circuit Protection / Reconfiguration Data / Architecture |
| Paper # | CPSY2005-83,DC2005-103 |
| Date of Issue |
| Conference Information | |
| Committee | DC |
|---|---|
| Conference Date | 2006/3/10(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Chair | |
| Vice Chair | |
| Secretary | |
| Assistant | |
| Paper Information | |
| Registration To | Dependable Computing (DC) |
|---|---|
| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Protection Systems for Programmable Logic Device against Circuit Malfunctions |
| Sub Title (in English) | |
| Keyword(1) | FPGA |
| Keyword(2) | Circuit Protection |
| Keyword(3) | Reconfiguration Data |
| Keyword(4) | Architecture |
| 1st Author's Name | Hiroyuki YOKOYAMA |
| 1st Author's Affiliation | KDDI R&D Laboratories, Inc.() |
| 2nd Author's Name | Yohei HORI |
| 2nd Author's Affiliation | National Institute of Advanced Industrial Science and Technology |
| 3rd Author's Name | Kenji TODA |
| 3rd Author's Affiliation | National Institute of Advanced Industrial Science and Technology |
| Date | 2006/3/10 |
| Paper # | CPSY2005-83,DC2005-103 |
| Volume (vol) | vol.105 |
| Number (no) | 672 |
| Page | pp.pp.- |
| #Pages | 5 |
| Date of Issue | |