Presentation 2006/3/9
Protocol Wrapper Generation from Statement Based Specification
Yuji ISHIKAWA, Shota WATANABE, Kenshu SETO, Masahiro FUJITA,
PDF Download Page PDF download Page Link
Abstract(in Japanese) (See Japanese page)
Abstract(in English) IP Reuse is becoming important in VLSI design. When IPs are used in the design, it is often become problem that interface protocol does not match among IPs. To avoid this problem, methods for protocol wrapper synthesis are necessary. However, most of the existing methods require protocol specification in form which consumes lots of time to describe. In this paper, we propose a language to describe protocol specification concisely with a few statements and a protocol wrapper synthesis method which accepts the proposed description language as its input. We demonstrate and evaluate our method by sythesizing some wrappers.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) IP(Intellectual Property) / Interface Protocol / Protocol Conversion / Protocol Specification / Protocol Wrapper
Paper # DC2005-95
Date of Issue

Conference Information
Committee DC
Conference Date 2006/3/9(1days)
Place (in Japanese) (See Japanese page)
Place (in English)
Topics (in Japanese) (See Japanese page)
Topics (in English)
Chair
Vice Chair
Secretary
Assistant

Paper Information
Registration To Dependable Computing (DC)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Protocol Wrapper Generation from Statement Based Specification
Sub Title (in English)
Keyword(1) IP(Intellectual Property)
Keyword(2) Interface Protocol
Keyword(3) Protocol Conversion
Keyword(4) Protocol Specification
Keyword(5) Protocol Wrapper
1st Author's Name Yuji ISHIKAWA
1st Author's Affiliation Department of Information and Communication Engineering, Faculty of Engineering, University of Tokyo()
2nd Author's Name Shota WATANABE
2nd Author's Affiliation Department of Electronics Engineering, School of Engineering, University of Tokyo
3rd Author's Name Kenshu SETO
3rd Author's Affiliation VLSI Design & Education Center, University of Tokyo
4th Author's Name Masahiro FUJITA
4th Author's Affiliation VLSI Design & Education Center, University of Tokyo
Date 2006/3/9
Paper # DC2005-95
Volume (vol) vol.105
Number (no) 671
Page pp.pp.-
#Pages 6
Date of Issue