| Presentation | 2006/3/9 A Clock Tree Construction Method Under Delay Variations Masayuki IGUCHI, Atsushi TAKAHASHI, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | As LSI chips become larger and faster, the effect of delay variations on the circuit behavior becomes larger. The consideration of delay variations is requested in semi-synchronous circuits that use the difference of clock delays effectively, too. In this paper, we propose a clock tree construction method that takes delay variations of a long time constant into account. In the proposed method, first, an objective clock schedule is obtained under the assumption that delay variations of clock delay are proportional to the wire length, but that the delay variations on the common part of clock wire to a register pair with signal propagation do not affect the circuit behavior. Then, a clock tree is constructed so that the clock schedule realized by the clock tree approaches the objective clock schedule. In experiments, the validity of the proposed method is confirmed. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | semi-synchronous circuit / delay variation / clock-tree / minimum clock period |
| Paper # | DC2005-93 |
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| Conference Information | |
| Committee | DC |
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| Conference Date | 2006/3/9(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
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| Registration To | Dependable Computing (DC) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | A Clock Tree Construction Method Under Delay Variations |
| Sub Title (in English) | |
| Keyword(1) | semi-synchronous circuit |
| Keyword(2) | delay variation |
| Keyword(3) | clock-tree |
| Keyword(4) | minimum clock period |
| 1st Author's Name | Masayuki IGUCHI |
| 1st Author's Affiliation | Department of Communications and Integrated Systems, Tokyo Institute of Technology() |
| 2nd Author's Name | Atsushi TAKAHASHI |
| 2nd Author's Affiliation | Department of Communications and Integrated Systems, Tokyo Institute of Technology |
| Date | 2006/3/9 |
| Paper # | DC2005-93 |
| Volume (vol) | vol.105 |
| Number (no) | 671 |
| Page | pp.pp.- |
| #Pages | 6 |
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